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ALU testbench

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Adrien Bourmault 2021-12-10 15:39:52 +01:00
parent d983073bec
commit f1560a6556
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alu_tb.vhdl
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@ -33,7 +33,7 @@ architecture Structurel of ALU is
end function;
begin
alu_0 : entity work.alu(behavioral)
alu_0 : entity work.alu
port map(
op1 => op1,
op2 => op2,