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Shifter tb

This commit is contained in:
Adrien Bourmault 2022-01-20 23:59:28 +01:00
parent c42e9315a5
commit 5375e88722
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GPG Key ID: 6EB408FE0ACEC664
1 changed files with 149 additions and 9 deletions
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158
shifter_tb.vhdl
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@ -59,7 +59,9 @@ begin
seed2 := 1; seed2 := 1;
wait for 1 ns; wait for 1 ns;
report "[test_01] lsl with 32 random values";
-- lsl
report "lsl with 32 random values";
shift_lsl <= '1'; shift_lsl <= '1';
la : for va in 0 to 31 loop la : for va in 0 to 31 loop
@ -79,21 +81,159 @@ begin
end if; end if;
wait for 1 ns; wait for 1 ns;
--vdout := ? vdout := din sll shift_val;
--vcout := ? vcout := 0;
report "[test_01]: din = " & integer'image(to_integer(unsigned(din))); report "din = " & integer'image(to_integer(unsigned(din)));
report "[test_01]: shift_val = " & integer'image(to_integer(unsigned(shift_val))); report "shift_val = " & integer'image(to_integer(unsigned(shift_val)));
assert (dout = vdout) report "[error] lsl. vdout = " & integer'image(to_integer(unsigned(vdout))) & " versus dout = " & integer'image(to_integer(unsigned(dout))) severity error; assert (dout = vdout) report "[error] lsl. vdout = " & integer'image(to_integer(unsigned(vdout))) & " versus dout = " & integer'image(to_integer(unsigned(dout))) severity error;
assert (cout = vcout) report "[error] lsl. vcout = " & integer'image(to_integer(unsigned(vcout))) & " versus cout = " & integer'image(to_integer(unsigned(cout))) severity error; --assert (cout = vcout) report "[error] lsl. vcout = " & integer'image(to_integer(unsigned(vcout))) & " versus cout = " & integer'image(to_integer(unsigned(cout))) severity error;
end loop la; end loop la;
report "[test_01] finished";
wait for 1 ns; wait for 1 ns;
assert false report "end_of_test" severity note;
-- wait forever; this will finish the simulation. -- lsr
report "lsr with 32 random values";
shift_lsl <= '0';
shift_lsr <= '1';
la : for va in 0 to 31 loop
uniform(seed1, seed2, x);
y := integer(floor(x * 31.0)) + 1;
shift_val <= std_logic_vector(to_unsigned(y, shift_val'length));
uniform(seed1, seed2, x);
y := integer(floor(x * 536870911.0));
din <= std_logic_vector(to_unsigned(y, din'length));
if (y mod 2) = 0 then
cin <= '1';
else
cin <= '0';
end if;
wait for 1 ns;
vdout := din ror shift_val;
vcout := 0;
report "din = " & integer'image(to_integer(unsigned(din)));
report "shift_val = " & integer'image(to_integer(unsigned(shift_val)));
assert (dout = vdout) report "[error] lsl. vdout = " & integer'image(to_integer(unsigned(vdout))) & " versus dout = " & integer'image(to_integer(unsigned(dout))) severity error;
--assert (cout = vcout) report "[error] lsl. vcout = " & integer'image(to_integer(unsigned(vcout))) & " versus cout = " & integer'image(to_integer(unsigned(cout))) severity error;
end loop la;
wait for 1 ns;
-- asr
report "asr with 32 random values";
shift_asr <= '1';
shift_lsr <= '0';
la : for va in 0 to 31 loop
uniform(seed1, seed2, x);
y := integer(floor(x * 31.0)) + 1;
shift_val <= std_logic_vector(to_unsigned(y, shift_val'length));
uniform(seed1, seed2, x);
y := integer(floor(x * 536870911.0));
din <= std_logic_vector(to_unsigned(y, din'length));
if (y mod 2) = 0 then
cin <= '1';
else
cin <= '0';
end if;
wait for 1 ns;
vdout := din sra shift_val;
vcout := 0;
report "din = " & integer'image(to_integer(unsigned(din)));
report "shift_val = " & integer'image(to_integer(unsigned(shift_val)));
assert (dout = vdout) report "[error] lsl. vdout = " & integer'image(to_integer(unsigned(vdout))) & " versus dout = " & integer'image(to_integer(unsigned(dout))) severity error;
--assert (cout = vcout) report "[error] lsl. vcout = " & integer'image(to_integer(unsigned(vcout))) & " versus cout = " & integer'image(to_integer(unsigned(cout))) severity error;
end loop la;
wait for 1 ns;
-- ror
report "ror with 32 random values";
shift_ror <= '1';
shift_asr <= '0';
la : for va in 0 to 31 loop
uniform(seed1, seed2, x);
y := integer(floor(x * 31.0)) + 1;
shift_val <= std_logic_vector(to_unsigned(y, shift_val'length));
uniform(seed1, seed2, x);
y := integer(floor(x * 536870911.0));
din <= std_logic_vector(to_unsigned(y, din'length));
if (y mod 2) = 0 then
cin <= '1';
else
cin <= '0';
end if;
wait for 1 ns;
vdout := din ror shift_val;
vcout := 0;
report "din = " & integer'image(to_integer(unsigned(din)));
report "shift_val = " & integer'image(to_integer(unsigned(shift_val)));
assert (dout = vdout) report "[error] lsl. vdout = " & integer'image(to_integer(unsigned(vdout))) & " versus dout = " & integer'image(to_integer(unsigned(dout))) severity error;
--assert (cout = vcout) report "[error] lsl. vcout = " & integer'image(to_integer(unsigned(vcout))) & " versus cout = " & integer'image(to_integer(unsigned(cout))) severity error;
end loop la;
wait for 1 ns;
-- rrx
report "rrx with 32 random values";
shift_rrx <= '1';
shift_ror <= '0';
la : for va in 0 to 31 loop
uniform(seed1, seed2, x);
y := integer(floor(x * 31.0)) + 1;
shift_val <= std_logic_vector(to_unsigned(y, shift_val'length));
uniform(seed1, seed2, x);
y := integer(floor(x * 536870911.0));
din <= std_logic_vector(to_unsigned(y, din'length));
if (y mod 2) = 0 then
cin <= '1';
else
cin <= '0';
end if;
wait for 1 ns;
vdout := din rrx shift_val;
vcout := 0;
report "din = " & integer'image(to_integer(unsigned(din)));
report "shift_val = " & integer'image(to_integer(unsigned(shift_val)));
--assert (dout = vdout) report "[error] lsl. vdout = " & integer'image(to_integer(unsigned(vdout))) & " versus dout = " & integer'image(to_integer(unsigned(dout))) severity error;
--assert (cout = vcout) report "[error] lsl. vcout = " & integer'image(to_integer(unsigned(vcout))) & " versus cout = " & integer'image(to_integer(unsigned(cout))) severity error;
end loop la;
wait for 1 ns;
wait; wait;
end process; end process;