From 5375e88722803e50a0f189f736333143a9157ffb Mon Sep 17 00:00:00 2001 From: Adrien Bourmault Date: Thu, 20 Jan 2022 23:59:28 +0100 Subject: [PATCH] Shifter tb --- shifter_tb.vhdl | 158 +++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 149 insertions(+), 9 deletions(-) diff --git a/shifter_tb.vhdl b/shifter_tb.vhdl index ba3216b..474ecd6 100644 --- a/shifter_tb.vhdl +++ b/shifter_tb.vhdl @@ -59,7 +59,9 @@ begin seed2 := 1; wait for 1 ns; - report "[test_01] lsl with 32 random values"; + + -- lsl + report "lsl with 32 random values"; shift_lsl <= '1'; la : for va in 0 to 31 loop @@ -79,21 +81,159 @@ begin end if; wait for 1 ns; - --vdout := ? - --vcout := ? + vdout := din sll shift_val; + vcout := 0; - report "[test_01]: din = " & integer'image(to_integer(unsigned(din))); - report "[test_01]: shift_val = " & integer'image(to_integer(unsigned(shift_val))); + report "din = " & integer'image(to_integer(unsigned(din))); + report "shift_val = " & integer'image(to_integer(unsigned(shift_val))); assert (dout = vdout) report "[error] lsl. vdout = " & integer'image(to_integer(unsigned(vdout))) & " versus dout = " & integer'image(to_integer(unsigned(dout))) severity error; - assert (cout = vcout) report "[error] lsl. vcout = " & integer'image(to_integer(unsigned(vcout))) & " versus cout = " & integer'image(to_integer(unsigned(cout))) severity error; + --assert (cout = vcout) report "[error] lsl. vcout = " & integer'image(to_integer(unsigned(vcout))) & " versus cout = " & integer'image(to_integer(unsigned(cout))) severity error; end loop la; - report "[test_01] finished"; wait for 1 ns; - assert false report "end_of_test" severity note; - -- wait forever; this will finish the simulation. + + -- lsr + report "lsr with 32 random values"; + shift_lsl <= '0'; + shift_lsr <= '1'; + la : for va in 0 to 31 loop + + uniform(seed1, seed2, x); + y := integer(floor(x * 31.0)) + 1; + + shift_val <= std_logic_vector(to_unsigned(y, shift_val'length)); + + uniform(seed1, seed2, x); + y := integer(floor(x * 536870911.0)); + din <= std_logic_vector(to_unsigned(y, din'length)); + + if (y mod 2) = 0 then + cin <= '1'; + else + cin <= '0'; + end if; + wait for 1 ns; + + vdout := din ror shift_val; + vcout := 0; + + report "din = " & integer'image(to_integer(unsigned(din))); + report "shift_val = " & integer'image(to_integer(unsigned(shift_val))); + + assert (dout = vdout) report "[error] lsl. vdout = " & integer'image(to_integer(unsigned(vdout))) & " versus dout = " & integer'image(to_integer(unsigned(dout))) severity error; + --assert (cout = vcout) report "[error] lsl. vcout = " & integer'image(to_integer(unsigned(vcout))) & " versus cout = " & integer'image(to_integer(unsigned(cout))) severity error; + + end loop la; + + wait for 1 ns; + + -- asr + report "asr with 32 random values"; + shift_asr <= '1'; + shift_lsr <= '0'; + la : for va in 0 to 31 loop + + uniform(seed1, seed2, x); + y := integer(floor(x * 31.0)) + 1; + + shift_val <= std_logic_vector(to_unsigned(y, shift_val'length)); + + uniform(seed1, seed2, x); + y := integer(floor(x * 536870911.0)); + din <= std_logic_vector(to_unsigned(y, din'length)); + + if (y mod 2) = 0 then + cin <= '1'; + else + cin <= '0'; + end if; + wait for 1 ns; + + vdout := din sra shift_val; + vcout := 0; + + report "din = " & integer'image(to_integer(unsigned(din))); + report "shift_val = " & integer'image(to_integer(unsigned(shift_val))); + + assert (dout = vdout) report "[error] lsl. vdout = " & integer'image(to_integer(unsigned(vdout))) & " versus dout = " & integer'image(to_integer(unsigned(dout))) severity error; + --assert (cout = vcout) report "[error] lsl. vcout = " & integer'image(to_integer(unsigned(vcout))) & " versus cout = " & integer'image(to_integer(unsigned(cout))) severity error; + + end loop la; + + wait for 1 ns; + + -- ror + report "ror with 32 random values"; + shift_ror <= '1'; + shift_asr <= '0'; + la : for va in 0 to 31 loop + + uniform(seed1, seed2, x); + y := integer(floor(x * 31.0)) + 1; + + shift_val <= std_logic_vector(to_unsigned(y, shift_val'length)); + + uniform(seed1, seed2, x); + y := integer(floor(x * 536870911.0)); + din <= std_logic_vector(to_unsigned(y, din'length)); + + if (y mod 2) = 0 then + cin <= '1'; + else + cin <= '0'; + end if; + wait for 1 ns; + + vdout := din ror shift_val; + vcout := 0; + + report "din = " & integer'image(to_integer(unsigned(din))); + report "shift_val = " & integer'image(to_integer(unsigned(shift_val))); + + assert (dout = vdout) report "[error] lsl. vdout = " & integer'image(to_integer(unsigned(vdout))) & " versus dout = " & integer'image(to_integer(unsigned(dout))) severity error; + --assert (cout = vcout) report "[error] lsl. vcout = " & integer'image(to_integer(unsigned(vcout))) & " versus cout = " & integer'image(to_integer(unsigned(cout))) severity error; + + end loop la; + + wait for 1 ns; + + -- rrx + report "rrx with 32 random values"; + shift_rrx <= '1'; + shift_ror <= '0'; + la : for va in 0 to 31 loop + + uniform(seed1, seed2, x); + y := integer(floor(x * 31.0)) + 1; + + shift_val <= std_logic_vector(to_unsigned(y, shift_val'length)); + + uniform(seed1, seed2, x); + y := integer(floor(x * 536870911.0)); + din <= std_logic_vector(to_unsigned(y, din'length)); + + if (y mod 2) = 0 then + cin <= '1'; + else + cin <= '0'; + end if; + wait for 1 ns; + + vdout := din rrx shift_val; + vcout := 0; + + report "din = " & integer'image(to_integer(unsigned(din))); + report "shift_val = " & integer'image(to_integer(unsigned(shift_val))); + + --assert (dout = vdout) report "[error] lsl. vdout = " & integer'image(to_integer(unsigned(vdout))) & " versus dout = " & integer'image(to_integer(unsigned(dout))) severity error; + --assert (cout = vcout) report "[error] lsl. vcout = " & integer'image(to_integer(unsigned(vcout))) & " versus cout = " & integer'image(to_integer(unsigned(cout))) severity error; + + end loop la; + + wait for 1 ns; + wait; end process;