projet-vlsi/Makefile

GHDL = ghdl
all : sim_alu sim_shifter

%.o : %.vhdl
	${GHDL} -a -g -v $^

adder32_tb : adder1.o adder32.o adder32_tb.o
	${GHDL} -e -v adder32_tb

shifter_tb : shifter.o shifter_tb.o
	${GHDL} -e -v shifter_tb

alu_tb : adder1.o adder32.o alu.o alu_tb.o
	${GHDL} -e -v alu_tb

exec_tb :adder1.o adder32.o alu.o fifo_72b.o shifter.o exec.o exec_tb.o
	${GHDL} -e -v exec_tb

sim_adder32 : adder32_tb
	${GHDL} -r adder32_tb --vcd=adder32.vcd

sim_alu : alu_tb
	${GHDL} -r alu_tb --vcd=alu.vcd

sim_shifter : shifter_tb
	${GHDL} -r shifter_tb --vcd=shifter.vcd

sim_exec : exec_tb
	${GHDL} -r exec_tb --vcd=exec.vcd

clean :
	-rm *.o work-obj93.cf *_tb *.vcd