library ieee;
use ieee.math_real.all;
use ieee.numeric_std.all;
use ieee.std_logic_1164.all;

entity alu_tb is
end alu_tb;

ARCHITECTURE Structurel OF alu_tb is 
signal   op1  :     Std_Logic_Vector(31 downto 0) := std_logic_vector(to_unsigned(32654, 32));
signal   op2  :     Std_Logic_Vector(31 downto 0) := std_logic_vector(to_unsigned(65877, 32));
signal   cin  :     Std_Logic := '0';
signal   cmd  :     Std_Logic_Vector(1 downto 0) := "00";
signal   res  :     Std_Logic_Vector(31 downto 0) := (others => '0');
signal   cout :     Std_Logic;
signal   z    :     Std_Logic;
signal   n    :     Std_Logic;
signal   v    :     Std_Logic;
signal   vdd  :     bit := '1';
signal   vss  :     bit := '0';

begin


alu_ins: entity work.alu
PORT MAP(
            op1 => op1,
            op2 => op2,
            cin => cin,
            cmd => cmd,
            res => res,
            cout => cout,
            z => z,
            n => n,
            v => v,
            vdd => vdd,
            vss => vss
	);
process
begin

wait for 5 fs;
cmd <= "00";
wait for 5 fs;
report "op1 = " & integer'image(to_integer(unsigned(op1)));
report "op2 = " & integer'image(to_integer(unsigned(op2)));
report "res = " & integer'image(to_integer(unsigned(res)));
assert z/='1'report "z";
assert n/='1'report "n";
assert v/='1'report "v";

wait for 5 fs;

cmd <= "01";
wait for 5 fs;
report "op1 = " & integer'image(to_integer(unsigned(op1)));
report "op2 = " & integer'image(to_integer(unsigned(op2)));
report "res = " & integer'image(to_integer(unsigned(res)));
assert z/='1'report "z";
assert n/='1'report "n";
assert v/='1'report "v";

wait for 5 fs;

cmd <= "10";
wait for 5 fs;
report "op1 = " & integer'image(to_integer(unsigned(op1)));
report "op2 = " & integer'image(to_integer(unsigned(op2)));
report "res = " & integer'image(to_integer(unsigned(res)));
assert z/='1'report "z";
assert n/='1'report "n";
assert v/='1'report "v";

wait for 5 fs;

cmd <= "11";
wait for 5 fs;
report "op1 = " & integer'image(to_integer(unsigned(op1)));
report "op2 = " & integer'image(to_integer(unsigned(op2)));
report "res = " & integer'image(to_integer(unsigned(res)));
assert z/='1'report "z";
assert n/='1'report "n";
assert v/='1'report "v";

wait for 5 fs;
cmd <= "00";
wait for 5 fs;
report "op1 = " & integer'image(to_integer(unsigned(op1)));
report "op2 = " & integer'image(to_integer(unsigned(op2)));
report "res = " & integer'image(to_integer(unsigned(res)));
assert z/='1'report "z";
assert n/='1'report "n";
assert v/='1'report "v";


wait for 5 fs;
cmd <= "00";
wait for 5 fs;
report "op1 = " & integer'image(to_integer(unsigned(op1)));
report "op2 = " & integer'image(to_integer(unsigned(op2)));
report "res = " & integer'image(to_integer(unsigned(res)));
assert z/='1'report "z";
assert n/='1'report "n";
assert v/='1'report "v";

wait for 50 fs;

WAIT;
end process;

END Structurel;