From b85ba604ffa2906b134c32ea0511c4a0120d2546 Mon Sep 17 00:00:00 2001
From: Adrien Bourmault <neox@a-lec.org>
Date: Mon, 21 Mar 2022 12:23:01 +0100
Subject: [PATCH] DCC_Bit_0 TB

---
 DCC_Bit_0.vhd | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/DCC_Bit_0.vhd b/DCC_Bit_0.vhd
index 02786fa..e9c3d67 100644
--- a/DCC_Bit_0.vhd
+++ b/DCC_Bit_0.vhd
@@ -25,7 +25,9 @@ begin
 	--MAE
 	process(clk_100MHz, reset)
 	begin
-		if reset = '1' then fs <= idle;
+		if reset = '1' then 
+			fs <= idle;
+
 		elsif rising_edge(clk_100MHz) then
 
 			if cs = idle then
@@ -42,15 +44,17 @@ begin
 
 				out_value <= '0';
 
-				if cpt > 99 then fs <= out_1;
+				if cpt >= 99 then 
+					fs <= out_1;
 				end if;
 
 			elsif cs = out_1 then 
 
 				out_value <= '1';
 
-				if cpt > 199 then
+				if cpt >= 199 then
 					fs <= idle;
+					out_value <= '0';
 					fin <= '1';
 					inc_cpt <= '0';
 				end if;			
@@ -58,7 +62,7 @@ begin
 			end if;
 			cs <= fs;
 		end if;
-				
+
 	end process;
 
 	--Compteur de Temporisation
@@ -69,11 +73,13 @@ begin
 			cpt <= 0;
 
 		elsif rising_edge(clk_1MHz) then
-
+        
 			if inc_cpt = '1' then
 				cpt <= cpt + 1;
+			else
+				cpt <= 0;
 			end if;
-
+        
 		end if;
 	end process;