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17744e00af
...
b570b32328
Author | SHA1 | Date |
---|---|---|
Adrien Bourmault | b570b32328 | |
Adrien Bourmault | 2634fb718b | |
Adrien Bourmault | 3376e2b690 | |
Adrien Bourmault | 87def964c7 |
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@ -273,3 +273,4 @@ void set_task(struct task *ctx)
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}
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}
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```
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```
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## Exercice 4
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@ -66,15 +66,15 @@ void main_multiboot2(void *mb2)
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disable_pic(); /* disable anoying legacy PIC */
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disable_pic(); /* disable anoying legacy PIC */
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sti(); /* enable interrupts */
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sti(); /* enable interrupts */
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uint64_t cr3 = store_cr3();
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/* uint64_t cr3 = store_cr3(); */
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printk("[main] PML4 exists @ 0x%lx\n", cr3);
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/* printk("[main] PML4 exists @ 0x%lx\n", cr3); */
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print_pgt(cr3, 4);
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/* print_pgt(cr3, 4); */
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fake.pgt = store_cr3();
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/* fake.pgt = store_cr3(); */
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new = alloc_page();
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/* new = alloc_page(); */
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map_page(&fake, 0x201000, new);
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/* map_page(&fake, 0x201000, new); */
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printk("-----------\n\n");
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//printk("-----------\n\n");
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load_tasks(mb2); /* load the tasks in memory */
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load_tasks(mb2); /* load the tasks in memory */
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run_tasks(); /* run the loaded tasks */
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run_tasks(); /* run the loaded tasks */
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@ -176,10 +176,10 @@ void map_page(struct task *ctx, vaddr_t vaddr, paddr_t paddr)
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// Mapping, we're n == 1
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// Mapping, we're n == 1
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// Checking validity and addr != 0
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// Checking validity and addr != 0
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if (cur_pml[PGT_PML_INDEX(n, vaddr)] & PGT_VALID_MASK) {
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if (cur_pml[PGT_PML_INDEX(n, vaddr)] & PGT_VALID_MASK) {
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printk("[map_page] ERR : vaddr 0x%lx WAS ALREADY mapped to 0x%lx !!!\n",
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/* printk("[map_page] ERR : vaddr 0x%lx WAS ALREADY mapped to 0x%lx !!!\n", */
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vaddr,
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/* vaddr, */
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cur_pml[PGT_PML_INDEX(n, vaddr)]
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/* cur_pml[PGT_PML_INDEX(n, vaddr)] */
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& PGT_ADDR_MASK);
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/* & PGT_ADDR_MASK); */
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return;
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return;
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} else {
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} else {
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cur_pml[PGT_PML_INDEX(n, vaddr)] = paddr | PGT_VALID_MASK
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cur_pml[PGT_PML_INDEX(n, vaddr)] = paddr | PGT_VALID_MASK
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@ -196,31 +196,36 @@ void map_page(struct task *ctx, vaddr_t vaddr, paddr_t paddr)
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void load_task(struct task *ctx)
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void load_task(struct task *ctx)
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{
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{
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uint64_t *cur_vaddr = NULL;
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vaddr_t cur_vaddr = 0;
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uint64_t *end_vaddr = NULL;
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vaddr_t end_vaddr = 0;
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cur_vaddr = (uint64_t *)ctx->load_vaddr;
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cur_vaddr = (vaddr_t)ctx->load_vaddr;
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end_vaddr = (uint64_t *)(ctx->load_vaddr
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end_vaddr = (vaddr_t)(ctx->load_vaddr
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+ ctx->load_end_paddr
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+ ctx->load_end_paddr
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- ctx->load_paddr);
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- ctx->load_paddr);
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printk("[load_task] payload (0x%lx to 0x%lx), ", cur_vaddr, end_vaddr);
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// Allocating payload pages
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// Allocating payload pages
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while (cur_vaddr < end_vaddr) {
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while (cur_vaddr < end_vaddr) {
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map_page(ctx, (vaddr_t)cur_vaddr, alloc_page());
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map_page(ctx, cur_vaddr, alloc_page());
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cur_vaddr += PGT_PAGE_SIZE;
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cur_vaddr += PGT_PAGE_SIZE;
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}
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}
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//printk("\tfinished map payload\n");
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//printk("\tfinished map payload\n");
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printk("bss (0x%lx), ", ctx->bss_end_vaddr);
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// Allocating bss
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// Allocating bss
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while ((vaddr_t)cur_vaddr < ctx->bss_end_vaddr) {
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while (cur_vaddr < ctx->bss_end_vaddr) {
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map_page(ctx, (vaddr_t)cur_vaddr, alloc_page());
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map_page(ctx, cur_vaddr, alloc_page());
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cur_vaddr += PGT_PAGE_SIZE;
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printk("|");
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}
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}
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//printk("stack (0x%lx), ", (vaddr_t)ctx->context.rsp - PGT_PAGE_SIZE);
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// Mapping one stack page
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// Mapping one stack page
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map_page(ctx, (vaddr_t)ctx->context.rsp - PGT_PAGE_SIZE, alloc_page());
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//map_page(ctx, (vaddr_t)ctx->context.rsp - PGT_PAGE_SIZE, alloc_page());
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printk("[load_task] task from @0x%lx loaded\n", ctx->load_paddr);
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printk("loaded @0x%lx\n", ctx->load_paddr);
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}
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}
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void set_task(struct task *ctx)
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void set_task(struct task *ctx)
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@ -236,12 +241,29 @@ void set_task(struct task *ctx)
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*cur_vaddr = (uint64_t)0;
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*cur_vaddr = (uint64_t)0;
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cur_vaddr++;
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cur_vaddr++;
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}
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}
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// test
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/* printk("\taccessing @0x%lx : 0x%x\n", */
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/* ctx->load_vaddr, */
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/* *((uint64_t *)ctx->load_vaddr)); */
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printk("[set_task] task set @ 0x%lx (PML4 at 0x%lx)\n",
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printk("[set_task] task set @ 0x%lx (PML4 at 0x%lx)\n",
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ctx->load_paddr, ctx->pgt);
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ctx->load_paddr, ctx->pgt);
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}
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}
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void mmap(struct task *ctx, vaddr_t vaddr)
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void mmap(struct task *ctx, vaddr_t vaddr)
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{
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{
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uint64_t *cur_vaddr = (uint64_t *)vaddr;
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map_page(ctx, (vaddr_t)cur_vaddr, alloc_page());
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// Zeroing page
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while((vaddr_t)cur_vaddr - vaddr < PGT_PAGE_SIZE) {
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*cur_vaddr = (uint64_t)0;
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cur_vaddr++;
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}
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printk("[mmap] mapped @ 0x%lx\n",
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vaddr);
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}
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}
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void munmap(struct task *ctx, vaddr_t vaddr)
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void munmap(struct task *ctx, vaddr_t vaddr)
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@ -250,9 +272,11 @@ void munmap(struct task *ctx, vaddr_t vaddr)
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void pgfault(struct interrupt_context *ctx)
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void pgfault(struct interrupt_context *ctx)
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{
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{
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printk("Page fault at %p\n", ctx->rip);
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printk("[pgfault] ERR : page fault at %p\n", ctx->rip);
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printk(" cr2 = %p\n", store_cr2());
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printk("\tcr2 = %p\n", store_cr2());
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printk("\trip = %p\n", ctx->rip);
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asm volatile ("hlt");
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asm volatile ("hlt");
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}
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}
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void duplicate_task(struct task *ctx)
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void duplicate_task(struct task *ctx)
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@ -0,0 +1,10 @@
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set timeout=0
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set default=0
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menuentry 'Rackdoll' {
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echo 'Loading Rackdoll OS'
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multiboot2 /boot/rackdoll.elf
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module2 /boot/hash.elf
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module2 /boot/sieve.elf
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module2 /boot/adversary.elf
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}
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Load Diff
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@ -0,0 +1,525 @@
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CPU Reset (CPU 0)
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EAX=00000000 EBX=00000000 ECX=00000000 EDX=00000000
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ESI=00000000 EDI=00000000 EBP=00000000 ESP=00000000
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EIP=00000000 EFL=00000000 [-------] CPL=0 II=0 A20=0 SMM=0 HLT=0
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ES =0000 00000000 00000000 00000000
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CS =0000 00000000 00000000 00000000
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SS =0000 00000000 00000000 00000000
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DS =0000 00000000 00000000 00000000
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FS =0000 00000000 00000000 00000000
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GS =0000 00000000 00000000 00000000
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LDT=0000 00000000 00000000 00000000
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TR =0000 00000000 00000000 00000000
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GDT= 00000000 00000000
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IDT= 00000000 00000000
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CR0=00000000 CR2=00000000 CR3=00000000 CR4=00000000
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DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
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DR6=0000000000000000 DR7=0000000000000000
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CCS=00000000 CCD=00000000 CCO=DYNAMIC
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EFER=0000000000000000
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FCW=0000 FSW=0000 [ST=0] FTW=ff MXCSR=00000000
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FPR0=0000000000000000 0000 FPR1=0000000000000000 0000
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FPR2=0000000000000000 0000 FPR3=0000000000000000 0000
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FPR4=0000000000000000 0000 FPR5=0000000000000000 0000
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FPR6=0000000000000000 0000 FPR7=0000000000000000 0000
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XMM00=0000000000000000 0000000000000000 XMM01=0000000000000000 0000000000000000
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XMM02=0000000000000000 0000000000000000 XMM03=0000000000000000 0000000000000000
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XMM04=0000000000000000 0000000000000000 XMM05=0000000000000000 0000000000000000
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XMM06=0000000000000000 0000000000000000 XMM07=0000000000000000 0000000000000000
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CPU Reset (CPU 0)
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EAX=00000000 EBX=00000000 ECX=00000000 EDX=00060fb1
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ESI=00000000 EDI=00000000 EBP=00000000 ESP=00000000
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EIP=0000fff0 EFL=00000002 [-------] CPL=0 II=0 A20=1 SMM=0 HLT=0
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ES =0000 00000000 0000ffff 00009300
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CS =f000 ffff0000 0000ffff 00009b00
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SS =0000 00000000 0000ffff 00009300
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DS =0000 00000000 0000ffff 00009300
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FS =0000 00000000 0000ffff 00009300
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GS =0000 00000000 0000ffff 00009300
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LDT=0000 00000000 0000ffff 00008200
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TR =0000 00000000 0000ffff 00008b00
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GDT= 00000000 0000ffff
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IDT= 00000000 0000ffff
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CR0=60000010 CR2=00000000 CR3=00000000 CR4=00000000
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DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
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DR6=00000000ffff0ff0 DR7=0000000000000400
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CCS=00000000 CCD=00000000 CCO=DYNAMIC
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EFER=0000000000000000
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FCW=037f FSW=0000 [ST=0] FTW=00 MXCSR=00001f80
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FPR0=0000000000000000 0000 FPR1=0000000000000000 0000
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FPR2=0000000000000000 0000 FPR3=0000000000000000 0000
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FPR4=0000000000000000 0000 FPR5=0000000000000000 0000
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FPR6=0000000000000000 0000 FPR7=0000000000000000 0000
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XMM00=0000000000000000 0000000000000000 XMM01=0000000000000000 0000000000000000
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XMM02=0000000000000000 0000000000000000 XMM03=0000000000000000 0000000000000000
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XMM04=0000000000000000 0000000000000000 XMM05=0000000000000000 0000000000000000
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XMM06=0000000000000000 0000000000000000 XMM07=0000000000000000 0000000000000000
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SMM: enter
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EAX=00000001 EBX=00000000 ECX=02000000 EDX=02000628
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ESI=0000000b EDI=02000000 EBP=00014ca0 ESP=00006c60
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EIP=000ead6e EFL=00000002 [-------] CPL=0 II=0 A20=1 SMM=0 HLT=0
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ES =0010 00000000 ffffffff 00cf9300 DPL=0 DS [-WA]
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CS =0008 00000000 ffffffff 00cf9b00 DPL=0 CS32 [-RA]
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SS =0010 00000000 ffffffff 00cf9300 DPL=0 DS [-WA]
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DS =0010 00000000 ffffffff 00cf9300 DPL=0 DS [-WA]
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FS =0010 00000000 ffffffff 00cf9300 DPL=0 DS [-WA]
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GS =0010 00000000 ffffffff 00cf9300 DPL=0 DS [-WA]
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LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT
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TR =0000 00000000 0000ffff 00008b00 DPL=0 TSS32-busy
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GDT= 000f6180 00000037
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IDT= 000f61be 00000000
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CR0=00000011 CR2=00000000 CR3=00000000 CR4=00000000
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DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
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DR6=00000000ffff0ff0 DR7=0000000000000400
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CCS=00000080 CCD=00000001 CCO=LOGICB
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EFER=0000000000000000
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SMM: after RSM
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EAX=00000001 EBX=00000000 ECX=02000000 EDX=02000628
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ESI=0000000b EDI=02000000 EBP=00014ca0 ESP=00006c60
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EIP=000ead6e EFL=00000002 [-------] CPL=0 II=0 A20=1 SMM=0 HLT=0
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ES =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
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CS =0008 00000000 ffffffff 00c09b00 DPL=0 CS32 [-RA]
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SS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
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DS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
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FS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
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GS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
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LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT
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TR =0000 00000000 0000ffff 00008b00 DPL=0 TSS32-busy
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GDT= 000f6180 00000037
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IDT= 000f61be 00000000
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CR0=00000011 CR2=00000000 CR3=00000000 CR4=00000000
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DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
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DR6=00000000ffff0ff0 DR7=0000000000000400
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CCS=00000000 CCD=00000000 CCO=EFLAGS
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EFER=0000000000000000
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Servicing hardware INT=0x08
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SMM: enter
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EAX=000000b5 EBX=000f7d6b ECX=00001234 EDX=00006cff
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ESI=00006cb8 EDI=beffec61 EBP=00006c78 ESP=00006c78
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EIP=00007d6a EFL=00000006 [-----P-] CPL=0 II=0 A20=1 SMM=0 HLT=0
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ES =d980 000d9800 ffffffff 008f9300
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CS =f000 000f0000 ffffffff 008f9b00
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SS =0000 00000000 ffffffff 008f9300
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DS =0000 00000000 ffffffff 008f9300
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FS =0000 00000000 ffffffff 008f9300
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GS =0000 00000000 ffffffff 008f9300
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LDT=0000 00000000 0000ffff 00008200
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TR =0000 00000000 0000ffff 00008b00
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GDT= 00000000 00000000
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IDT= 00000000 000003ff
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CR0=00000010 CR2=00000000 CR3=00000000 CR4=00000000
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DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
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DR6=00000000ffff0ff0 DR7=0000000000000400
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CCS=00000004 CCD=00006c78 CCO=EFLAGS
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EFER=0000000000000000
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SMM: after RSM
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EAX=000000b5 EBX=000f7d6b ECX=00001234 EDX=00006cff
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ESI=00006cb8 EDI=beffec61 EBP=00006c78 ESP=00006c78
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EIP=000f7d6b EFL=00000002 [-------] CPL=0 II=0 A20=1 SMM=0 HLT=0
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ES =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
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CS =0008 00000000 ffffffff 00c09b00 DPL=0 CS32 [-RA]
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SS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
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DS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
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FS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
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GS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
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LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT
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TR =0000 00000000 0000ffff 00008b00 DPL=0 TSS32-busy
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GDT= 000f6180 00000037
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IDT= 000f61be 00000000
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CR0=00000011 CR2=00000000 CR3=00000000 CR4=00000000
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DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
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DR6=00000000ffff0ff0 DR7=0000000000000400
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||||||
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CCS=00000000 CCD=00000000 CCO=EFLAGS
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EFER=0000000000000000
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|
SMM: enter
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||||||
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EAX=000000b5 EBX=00007d85 ECX=00005678 EDX=befe8d40
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ESI=000e8ae0 EDI=beffec61 EBP=00006c78 ESP=00006c78
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EIP=000f7d84 EFL=00000012 [----A--] CPL=0 II=0 A20=1 SMM=0 HLT=0
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ES =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
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CS =0008 00000000 ffffffff 00c09b00 DPL=0 CS32 [-RA]
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SS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
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DS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
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FS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
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GS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
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LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT
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TR =0000 00000000 0000ffff 00008b00 DPL=0 TSS32-busy
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GDT= 000f6180 00000037
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IDT= 000f61be 00000000
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CR0=00000011 CR2=00000000 CR3=00000000 CR4=00000000
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DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
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||||||
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DR6=00000000ffff0ff0 DR7=0000000000000400
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||||||
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CCS=00000010 CCD=00006c64 CCO=EFLAGS
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||||||
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EFER=0000000000000000
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SMM: after RSM
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EAX=000000b5 EBX=00007d85 ECX=00005678 EDX=befe8d40
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||||||
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ESI=000e8ae0 EDI=beffec61 EBP=00006c78 ESP=00006c78
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EIP=00007d85 EFL=00000006 [-----P-] CPL=0 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =d980 000d9800 ffffffff 00809300
|
||||||
|
CS =f000 000f0000 ffffffff 00809b00
|
||||||
|
SS =0000 00000000 ffffffff 00809300
|
||||||
|
DS =0000 00000000 ffffffff 00809300
|
||||||
|
FS =0000 00000000 ffffffff 00809300
|
||||||
|
GS =0000 00000000 ffffffff 00809300
|
||||||
|
LDT=0000 00000000 0000ffff 00008200
|
||||||
|
TR =0000 00000000 0000ffff 00008b00
|
||||||
|
GDT= 00000000 00000000
|
||||||
|
IDT= 00000000 000003ff
|
||||||
|
CR0=00000010 CR2=00000000 CR3=00000000 CR4=00000000
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=00000004 CCD=00000001 CCO=EFLAGS
|
||||||
|
EFER=0000000000000000
|
||||||
|
SMM: enter
|
||||||
|
EAX=000000b5 EBX=000f7d6b ECX=00001234 EDX=000069ff
|
||||||
|
ESI=0000699e EDI=beffec61 EBP=0000695e ESP=0000695e
|
||||||
|
EIP=00007d6a EFL=00000002 [-------] CPL=0 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =d980 000d9800 ffffffff 008f9300
|
||||||
|
CS =f000 000f0000 ffffffff 008f9b00
|
||||||
|
SS =0000 00000000 ffffffff 008f9300
|
||||||
|
DS =0000 00000000 ffffffff 008f9300
|
||||||
|
FS =0000 00000000 ffffffff 008f9300
|
||||||
|
GS =ca00 000ca000 ffffffff 008f9300
|
||||||
|
LDT=0000 00000000 0000ffff 00008200
|
||||||
|
TR =0000 00000000 0000ffff 00008b00
|
||||||
|
GDT= 00000000 00000000
|
||||||
|
IDT= 00000000 000003ff
|
||||||
|
CR0=00000010 CR2=00000000 CR3=00000000 CR4=00000000
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=00000000 CCD=0000695e CCO=EFLAGS
|
||||||
|
EFER=0000000000000000
|
||||||
|
SMM: after RSM
|
||||||
|
EAX=000000b5 EBX=000f7d6b ECX=00001234 EDX=000069ff
|
||||||
|
ESI=0000699e EDI=beffec61 EBP=0000695e ESP=0000695e
|
||||||
|
EIP=000f7d6b EFL=00000002 [-------] CPL=0 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
CS =0008 00000000 ffffffff 00c09b00 DPL=0 CS32 [-RA]
|
||||||
|
SS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
DS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
FS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
GS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT
|
||||||
|
TR =0000 00000000 0000ffff 00008b00 DPL=0 TSS32-busy
|
||||||
|
GDT= 000f6180 00000037
|
||||||
|
IDT= 000f61be 00000000
|
||||||
|
CR0=00000011 CR2=00000000 CR3=00000000 CR4=00000000
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=00000000 CCD=00000000 CCO=EFLAGS
|
||||||
|
EFER=0000000000000000
|
||||||
|
SMM: enter
|
||||||
|
EAX=000000b5 EBX=00007d85 ECX=00005678 EDX=00000005
|
||||||
|
ESI=00000000 EDI=beffec61 EBP=0000695e ESP=0000695e
|
||||||
|
EIP=000f7d84 EFL=00000012 [----A--] CPL=0 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
CS =0008 00000000 ffffffff 00c09b00 DPL=0 CS32 [-RA]
|
||||||
|
SS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
DS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
FS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
GS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT
|
||||||
|
TR =0000 00000000 0000ffff 00008b00 DPL=0 TSS32-busy
|
||||||
|
GDT= 000f6180 00000037
|
||||||
|
IDT= 000f61be 00000000
|
||||||
|
CR0=00000011 CR2=00000000 CR3=00000000 CR4=00000000
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=00000010 CCD=0000694a CCO=EFLAGS
|
||||||
|
EFER=0000000000000000
|
||||||
|
SMM: after RSM
|
||||||
|
EAX=000000b5 EBX=00007d85 ECX=00005678 EDX=00000005
|
||||||
|
ESI=00000000 EDI=beffec61 EBP=0000695e ESP=0000695e
|
||||||
|
EIP=00007d85 EFL=00000002 [-------] CPL=0 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =d980 000d9800 ffffffff 00809300
|
||||||
|
CS =f000 000f0000 ffffffff 00809b00
|
||||||
|
SS =0000 00000000 ffffffff 00809300
|
||||||
|
DS =0000 00000000 ffffffff 00809300
|
||||||
|
FS =0000 00000000 ffffffff 00809300
|
||||||
|
GS =ca00 000ca000 ffffffff 00809300
|
||||||
|
LDT=0000 00000000 0000ffff 00008200
|
||||||
|
TR =0000 00000000 0000ffff 00008b00
|
||||||
|
GDT= 00000000 00000000
|
||||||
|
IDT= 00000000 000003ff
|
||||||
|
CR0=00000010 CR2=00000000 CR3=00000000 CR4=00000000
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=00000000 CCD=00000001 CCO=EFLAGS
|
||||||
|
EFER=0000000000000000
|
||||||
|
SMM: enter
|
||||||
|
EAX=000000b5 EBX=000f7d6b ECX=00001234 EDX=000069ff
|
||||||
|
ESI=00006998 EDI=beffec61 EBP=00006958 ESP=00006958
|
||||||
|
EIP=00007d6a EFL=00000002 [-------] CPL=0 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =d980 000d9800 ffffffff 00809300
|
||||||
|
CS =f000 000f0000 ffffffff 00809b00
|
||||||
|
SS =0000 00000000 ffffffff 00809300
|
||||||
|
DS =0000 00000000 ffffffff 00809300
|
||||||
|
FS =0000 00000000 ffffffff 00809300
|
||||||
|
GS =ca00 000ca000 ffffffff 00809300
|
||||||
|
LDT=0000 00000000 0000ffff 00008200
|
||||||
|
TR =0000 00000000 0000ffff 00008b00
|
||||||
|
GDT= 00000000 00000000
|
||||||
|
IDT= 00000000 000003ff
|
||||||
|
CR0=00000010 CR2=00000000 CR3=00000000 CR4=00000000
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=00000000 CCD=00006958 CCO=EFLAGS
|
||||||
|
EFER=0000000000000000
|
||||||
|
SMM: after RSM
|
||||||
|
EAX=000000b5 EBX=000f7d6b ECX=00001234 EDX=000069ff
|
||||||
|
ESI=00006998 EDI=beffec61 EBP=00006958 ESP=00006958
|
||||||
|
EIP=000f7d6b EFL=00000002 [-------] CPL=0 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
CS =0008 00000000 ffffffff 00c09b00 DPL=0 CS32 [-RA]
|
||||||
|
SS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
DS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
FS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
GS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT
|
||||||
|
TR =0000 00000000 0000ffff 00008b00 DPL=0 TSS32-busy
|
||||||
|
GDT= 000f6180 00000037
|
||||||
|
IDT= 000f61be 00000000
|
||||||
|
CR0=00000011 CR2=00000000 CR3=00000000 CR4=00000000
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=00000000 CCD=00000000 CCO=EFLAGS
|
||||||
|
EFER=0000000000000000
|
||||||
|
SMM: enter
|
||||||
|
EAX=000000b5 EBX=00007d85 ECX=00005678 EDX=00000003
|
||||||
|
ESI=befcb1f0 EDI=beffec61 EBP=00006958 ESP=00006958
|
||||||
|
EIP=000f7d84 EFL=00000016 [----AP-] CPL=0 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
CS =0008 00000000 ffffffff 00c09b00 DPL=0 CS32 [-RA]
|
||||||
|
SS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
DS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
FS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
GS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT
|
||||||
|
TR =0000 00000000 0000ffff 00008b00 DPL=0 TSS32-busy
|
||||||
|
GDT= 000f6180 00000037
|
||||||
|
IDT= 000f61be 00000000
|
||||||
|
CR0=00000011 CR2=00000000 CR3=00000000 CR4=00000000
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=00000014 CCD=00006944 CCO=EFLAGS
|
||||||
|
EFER=0000000000000000
|
||||||
|
SMM: after RSM
|
||||||
|
EAX=000000b5 EBX=00007d85 ECX=00005678 EDX=00000003
|
||||||
|
ESI=befcb1f0 EDI=beffec61 EBP=00006958 ESP=00006958
|
||||||
|
EIP=00007d85 EFL=00000002 [-------] CPL=0 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =d980 000d9800 ffffffff 00809300
|
||||||
|
CS =f000 000f0000 ffffffff 00809b00
|
||||||
|
SS =0000 00000000 ffffffff 00809300
|
||||||
|
DS =0000 00000000 ffffffff 00809300
|
||||||
|
FS =0000 00000000 ffffffff 00809300
|
||||||
|
GS =ca00 000ca000 ffffffff 00809300
|
||||||
|
LDT=0000 00000000 0000ffff 00008200
|
||||||
|
TR =0000 00000000 0000ffff 00008b00
|
||||||
|
GDT= 00000000 00000000
|
||||||
|
IDT= 00000000 000003ff
|
||||||
|
CR0=00000010 CR2=00000000 CR3=00000000 CR4=00000000
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=00000000 CCD=00000001 CCO=EFLAGS
|
||||||
|
EFER=0000000000000000
|
||||||
|
SMM: enter
|
||||||
|
EAX=000000b5 EBX=000f7d6b ECX=00001234 EDX=000069ff
|
||||||
|
ESI=0000699e EDI=beffec61 EBP=0000695e ESP=0000695e
|
||||||
|
EIP=00007d6a EFL=00000002 [-------] CPL=0 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =d980 000d9800 ffffffff 00809300
|
||||||
|
CS =f000 000f0000 ffffffff 00809b00
|
||||||
|
SS =0000 00000000 ffffffff 00809300
|
||||||
|
DS =0000 00000000 ffffffff 00809300
|
||||||
|
FS =0000 00000000 ffffffff 00809300
|
||||||
|
GS =ca00 000ca000 ffffffff 00809300
|
||||||
|
LDT=0000 00000000 0000ffff 00008200
|
||||||
|
TR =0000 00000000 0000ffff 00008b00
|
||||||
|
GDT= 00000000 00000000
|
||||||
|
IDT= 00000000 000003ff
|
||||||
|
CR0=00000010 CR2=00000000 CR3=00000000 CR4=00000000
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=00000000 CCD=0000695e CCO=EFLAGS
|
||||||
|
EFER=0000000000000000
|
||||||
|
SMM: after RSM
|
||||||
|
EAX=000000b5 EBX=000f7d6b ECX=00001234 EDX=000069ff
|
||||||
|
ESI=0000699e EDI=beffec61 EBP=0000695e ESP=0000695e
|
||||||
|
EIP=000f7d6b EFL=00000002 [-------] CPL=0 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
CS =0008 00000000 ffffffff 00c09b00 DPL=0 CS32 [-RA]
|
||||||
|
SS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
DS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
FS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
GS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT
|
||||||
|
TR =0000 00000000 0000ffff 00008b00 DPL=0 TSS32-busy
|
||||||
|
GDT= 000f6180 00000037
|
||||||
|
IDT= 000f61be 00000000
|
||||||
|
CR0=00000011 CR2=00000000 CR3=00000000 CR4=00000000
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=00000000 CCD=00000000 CCO=EFLAGS
|
||||||
|
EFER=0000000000000000
|
||||||
|
SMM: enter
|
||||||
|
EAX=000000b5 EBX=00007d85 ECX=00005678 EDX=00000005
|
||||||
|
ESI=00000000 EDI=beffec61 EBP=0000695e ESP=0000695e
|
||||||
|
EIP=000f7d84 EFL=00000012 [----A--] CPL=0 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
CS =0008 00000000 ffffffff 00c09b00 DPL=0 CS32 [-RA]
|
||||||
|
SS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
DS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
FS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
GS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT
|
||||||
|
TR =0000 00000000 0000ffff 00008b00 DPL=0 TSS32-busy
|
||||||
|
GDT= 000f6180 00000037
|
||||||
|
IDT= 000f61be 00000000
|
||||||
|
CR0=00000011 CR2=00000000 CR3=00000000 CR4=00000000
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=00000010 CCD=0000694a CCO=EFLAGS
|
||||||
|
EFER=0000000000000000
|
||||||
|
SMM: after RSM
|
||||||
|
EAX=000000b5 EBX=00007d85 ECX=00005678 EDX=00000005
|
||||||
|
ESI=00000000 EDI=beffec61 EBP=0000695e ESP=0000695e
|
||||||
|
EIP=00007d85 EFL=00000002 [-------] CPL=0 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =d980 000d9800 ffffffff 00809300
|
||||||
|
CS =f000 000f0000 ffffffff 00809b00
|
||||||
|
SS =0000 00000000 ffffffff 00809300
|
||||||
|
DS =0000 00000000 ffffffff 00809300
|
||||||
|
FS =0000 00000000 ffffffff 00809300
|
||||||
|
GS =ca00 000ca000 ffffffff 00809300
|
||||||
|
LDT=0000 00000000 0000ffff 00008200
|
||||||
|
TR =0000 00000000 0000ffff 00008b00
|
||||||
|
GDT= 00000000 00000000
|
||||||
|
IDT= 00000000 000003ff
|
||||||
|
CR0=00000010 CR2=00000000 CR3=00000000 CR4=00000000
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=00000000 CCD=00000001 CCO=EFLAGS
|
||||||
|
EFER=0000000000000000
|
||||||
|
SMM: enter
|
||||||
|
EAX=000000b5 EBX=000f7d6b ECX=00001234 EDX=000069ff
|
||||||
|
ESI=00006998 EDI=beffec61 EBP=00006958 ESP=00006958
|
||||||
|
EIP=00007d6a EFL=00000002 [-------] CPL=0 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =d980 000d9800 ffffffff 00809300
|
||||||
|
CS =f000 000f0000 ffffffff 00809b00
|
||||||
|
SS =0000 00000000 ffffffff 00809300
|
||||||
|
DS =0000 00000000 ffffffff 00809300
|
||||||
|
FS =0000 00000000 ffffffff 00809300
|
||||||
|
GS =ca00 000ca000 ffffffff 00809300
|
||||||
|
LDT=0000 00000000 0000ffff 00008200
|
||||||
|
TR =0000 00000000 0000ffff 00008b00
|
||||||
|
GDT= 00000000 00000000
|
||||||
|
IDT= 00000000 000003ff
|
||||||
|
CR0=00000010 CR2=00000000 CR3=00000000 CR4=00000000
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=00000000 CCD=00006958 CCO=EFLAGS
|
||||||
|
EFER=0000000000000000
|
||||||
|
SMM: after RSM
|
||||||
|
EAX=000000b5 EBX=000f7d6b ECX=00001234 EDX=000069ff
|
||||||
|
ESI=00006998 EDI=beffec61 EBP=00006958 ESP=00006958
|
||||||
|
EIP=000f7d6b EFL=00000002 [-------] CPL=0 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
CS =0008 00000000 ffffffff 00c09b00 DPL=0 CS32 [-RA]
|
||||||
|
SS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
DS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
FS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
GS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT
|
||||||
|
TR =0000 00000000 0000ffff 00008b00 DPL=0 TSS32-busy
|
||||||
|
GDT= 000f6180 00000037
|
||||||
|
IDT= 000f61be 00000000
|
||||||
|
CR0=00000011 CR2=00000000 CR3=00000000 CR4=00000000
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=00000000 CCD=00000000 CCO=EFLAGS
|
||||||
|
EFER=0000000000000000
|
||||||
|
SMM: enter
|
||||||
|
EAX=000000b5 EBX=00007d85 ECX=00005678 EDX=00000003
|
||||||
|
ESI=bef0b1f0 EDI=beffec61 EBP=00006958 ESP=00006958
|
||||||
|
EIP=000f7d84 EFL=00000016 [----AP-] CPL=0 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
CS =0008 00000000 ffffffff 00c09b00 DPL=0 CS32 [-RA]
|
||||||
|
SS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
DS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
FS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
GS =0010 00000000 ffffffff 00c09300 DPL=0 DS [-WA]
|
||||||
|
LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT
|
||||||
|
TR =0000 00000000 0000ffff 00008b00 DPL=0 TSS32-busy
|
||||||
|
GDT= 000f6180 00000037
|
||||||
|
IDT= 000f61be 00000000
|
||||||
|
CR0=00000011 CR2=00000000 CR3=00000000 CR4=00000000
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=00000014 CCD=00006944 CCO=EFLAGS
|
||||||
|
EFER=0000000000000000
|
||||||
|
SMM: after RSM
|
||||||
|
EAX=000000b5 EBX=00007d85 ECX=00005678 EDX=00000003
|
||||||
|
ESI=bef0b1f0 EDI=beffec61 EBP=00006958 ESP=00006958
|
||||||
|
EIP=00007d85 EFL=00000002 [-------] CPL=0 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =d980 000d9800 ffffffff 00809300
|
||||||
|
CS =f000 000f0000 ffffffff 00809b00
|
||||||
|
SS =0000 00000000 ffffffff 00809300
|
||||||
|
DS =0000 00000000 ffffffff 00809300
|
||||||
|
FS =0000 00000000 ffffffff 00809300
|
||||||
|
GS =ca00 000ca000 ffffffff 00809300
|
||||||
|
LDT=0000 00000000 0000ffff 00008200
|
||||||
|
TR =0000 00000000 0000ffff 00008b00
|
||||||
|
GDT= 00000000 00000000
|
||||||
|
IDT= 00000000 000003ff
|
||||||
|
CR0=00000010 CR2=00000000 CR3=00000000 CR4=00000000
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=00000000 CCD=00000001 CCO=EFLAGS
|
||||||
|
EFER=0000000000000000
|
||||||
|
Servicing hardware INT=0x08
|
||||||
|
Servicing hardware INT=0x08
|
||||||
|
Servicing hardware INT=0x08
|
||||||
|
Servicing hardware INT=0x08
|
||||||
|
Servicing hardware INT=0x08
|
||||||
|
Servicing hardware INT=0x08
|
||||||
|
Servicing hardware INT=0x08
|
||||||
|
0: v=81 e=0000 i=1 cpl=0 IP=0008:0000000000101863 pc=0000000000101863 SP=0010:0000000000109ff0 env->regs[R_EAX]=0000000000000001
|
||||||
|
RAX=0000000000000001 RBX=0000000000151650 RCX=00000000000003d5 RDX=000000000000001b
|
||||||
|
RSI=0000000000000000 RDI=000000000014e158 RBP=0000000000000000 RSP=0000000000109ff0
|
||||||
|
R8 =00000000000002d0 R9 =0000000000000000 R10=0000000000000000 R11=0000000000000000
|
||||||
|
R12=0000000000000000 R13=0000000000000000 R14=0000000000000000 R15=0000000000000000
|
||||||
|
RIP=0000000000101863 RFL=00000293 [--S-A-C] CPL=0 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =0010 0000000000000000 00000000 00009300 DPL=0 DS [-WA]
|
||||||
|
CS =0008 0000000000000000 00000000 00209a00 DPL=0 CS64 [-R-]
|
||||||
|
SS =0010 0000000000000000 00000000 00009300 DPL=0 DS [-WA]
|
||||||
|
DS =0010 0000000000000000 00000000 00009300 DPL=0 DS [-WA]
|
||||||
|
FS =0010 0000000000000000 00000000 00009300 DPL=0 DS [-WA]
|
||||||
|
GS =0010 0000000000000000 00000000 00009300 DPL=0 DS [-WA]
|
||||||
|
LDT=0000 0000000000000000 0000ffff 00008200 DPL=0 LDT
|
||||||
|
TR =0028 000000000014e000 0000006f 00008900 DPL=0 TSS64-avl
|
||||||
|
GDT= 0000000000103024 00000037
|
||||||
|
IDT= 000000000010b820 00000fff
|
||||||
|
CR0=80000111 CR2=0000000000000000 CR3=0000000000104000 CR4=000000a0
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=0000000000000003 CCD=fffffffffffffffe CCO=SUBQ
|
||||||
|
EFER=0000000000000500
|
||||||
|
check_exception old: 0xffffffff new 0xe
|
||||||
|
1: v=0e e=0005 i=0 cpl=3 IP=0023:0000002000000030 pc=0000002000000030 SP=001b:0000002000000000 CR2=0000000000000000
|
||||||
|
RAX=0000000000000000 RBX=0000000000000000 RCX=0000000000000000 RDX=0000000000000000
|
||||||
|
RSI=0000000000000000 RDI=0000000000000000 RBP=0000000000000000 RSP=0000002000000000
|
||||||
|
R8 =0000000000000000 R9 =0000000000000000 R10=0000000000000000 R11=0000000000000000
|
||||||
|
R12=0000000000000000 R13=0000000000000000 R14=0000000000000000 R15=0000000000000000
|
||||||
|
RIP=0000002000000030 RFL=00000202 [-------] CPL=3 II=0 A20=1 SMM=0 HLT=0
|
||||||
|
ES =0000 0000000000000000 00000000 00001300
|
||||||
|
CS =0023 0000000000000000 00000000 0020fa00 DPL=3 CS64 [-R-]
|
||||||
|
SS =001b 0000000000000000 00000000 0000f200 DPL=3 DS [-W-]
|
||||||
|
DS =0000 0000000000000000 00000000 00001300
|
||||||
|
FS =0000 0000000000000000 00000000 00001300
|
||||||
|
GS =0000 0000000000000000 00000000 00001300
|
||||||
|
LDT=0000 0000000000000000 0000ffff 00008200 DPL=0 LDT
|
||||||
|
TR =0028 000000000014e000 0000006f 00008900 DPL=0 TSS64-avl
|
||||||
|
GDT= 0000000000103024 00000037
|
||||||
|
IDT= 000000000010b820 00000fff
|
||||||
|
CR0=80000111 CR2=0000000000000000 CR3=0000000000113000 CR4=000000a0
|
||||||
|
DR0=0000000000000000 DR1=0000000000000000 DR2=0000000000000000 DR3=0000000000000000
|
||||||
|
DR6=00000000ffff0ff0 DR7=0000000000000400
|
||||||
|
CCS=0000000000000000 CCD=0000000000109fc8 CCO=EFLAGS
|
||||||
|
EFER=0000000000000500
|
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|
@ -0,0 +1,11 @@
|
||||||
|
<html>
|
||||||
|
<head>
|
||||||
|
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||||
|
<style type="text/css" style="display:none;"> P {margin-top:0;margin-bottom:0;} </style>
|
||||||
|
</head>
|
||||||
|
<body dir="ltr">
|
||||||
|
<div style="font-family: Aptos, Aptos_EmbeddedFont, Aptos_MSFontService, Calibri, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);" class="elementToProof">
|
||||||
|
<br>
|
||||||
|
</div>
|
||||||
|
</body>
|
||||||
|
</html>
|
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Loading…
Reference in New Issue