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\newacronym{Insee}{Insee}{Institut national de la statistique et des études économiques}
\newacronym{Tracfin}{Tracfin}{Traitement du renseignement et action contre les circuits financiers clandestins}

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Chapitre 1.
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% First chapter
\chapter{Modèles pour la simulation}
Ce cours s'intéresse aux différents modèles utilisés dans la simulation de circuits électroniques. On va s'intéresser aux trois modèles TLM, CABA et RTL.
\section{Motivations}
L'exemple des décodeurs TV HD est intéressant : créés en 200X, ce sont déjà des circuits assez grands et il faut de grandes équipes pour les concevoir. Les SoCs numériques modernes sont des architectures conjointes (on a des blocs numériques dédiés et des processeurs) et c'est la même chose avec les FPGA courants. Et on ne parle pas des téléphones.
Il faut une méthode pour les concevoir et les simuler de façon efficace.
\section{Flot de développement de niveau système}
\begin{itemize}
\item cahier des charges de l'application
\item modélisation du système
\item partitionnement logiciel/matériel
\item modélisations (matériel, interfaces, logiciel)
\item raffinement (matériel, interfaces, logiciel)
\item co-vérification : synthèse du matériel et compilation du logiciel
\item intégration système \newline
\end{itemize}
\section{Simulation lors de conceptions conjointes}
Lorsqu'on conçoit un système, il faut développer en parallèle la partie matérielle et la partie logicielle. Auparavant on utilisait en parallèle du FPGA et des compilateurs. Avec SystemC, on va pouvoir tout simuler (matériel et logiciel). Cela va permettre d'avoir un langage unique et donc d'éviter les erreurs de traduction.
\section{Précision de simulation de modèles}
Plus on est précis sur le temps et les cycles et plus le temps de simulation est très long.
Avec SystemC, on pourra choisir les niveaux de précision.
\section{Choisir un niveau d'abstraction}
Selon le niveau qu'on veut modéliser... et les langages qu'on maîtrise.
Les niveaux :
\begin{itemize}
\item algorithmique ;
\item untimed functional (UTF) ;
\item timed functional (TF) ;
\item bus cycled accurate (BCA) ;
\item cycled accurate (CA) ;
\item transfert de registre (RTL). \newline
\end{itemize}
En SystemC, on peut tout faire.
\section{Pourquoi utiliser SystemC ?}
On veut modéliser le matériel et le logiciel en même temps. Les fonctionnalités :
\begin{itemize}
\item horloges ;
\item vue du signal (GTKWave) ;
\item simulation basée sur le cycle (high-speed kernel) ;
\item niveaux d'abstraction multiples ;
\item protocoles de communication ;
\item support du débogage ;
\item vérifications d'erreur en run-time ;
\item support jusqu'au niveau RTL. \newline
\end{itemize}
C'est le fruit de la collaboration de plusieurs sociétés (Synopsys, Frontier Design, CoWare) puis géré par l'OSCI. Depuis 2011 c'est Accellera, à but non lucratif.
Le changement de niveau de précision est graduel (en utilisant des fonctions de plus en plus spécifiques).
%\begin{figure}[h!]
% \center
% \includegraphics{images/su.png}
% \caption{Petite image}
% \label{fig:schema1}
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%Blabla \newline
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%
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%
%Bla à propos de l'\textbf{bla important} dont le fonctionnement est schématisé dans la figure \ref{fig:schema1}.
%
%% Second chapter
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%
%A ce propos \textit{italique}.
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% \center
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%
%Texte pour dire tout ça parceque oui. \newline
%
%Ceci ne veut pas dire cependant que :
%
%\begin{itemize}
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%\item Élément 2
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%\item Élément 3
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%\end{itemize}
\newpage
% Bibliography
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\addcontentsline{toc}{chapter}{Bibliographie}
\printbibliography
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\babel@toc {french}{}\relax
\contentsline {chapter}{\numberline {1}Modèles pour la simulation}{2}{chapter.1}%
\contentsline {section}{\numberline {1.1}Motivations}{2}{section.1.1}%
\contentsline {section}{\numberline {1.2}Flot de développement de niveau système}{2}{section.1.2}%
\contentsline {section}{\numberline {1.3}Simulation lors de conceptions conjointes}{2}{section.1.3}%
\contentsline {section}{\numberline {1.4}Précision de simulation de modèles}{2}{section.1.4}%
\contentsline {section}{\numberline {1.5}Choisir un niveau d'abstraction}{3}{section.1.5}%
\contentsline {section}{\numberline {1.6}Pourquoi utiliser SystemC ?}{3}{section.1.6}%

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% -*- coding: utf-8 -*-
% Preamble
\documentclass[french, 12pt]{report}
\usepackage[utf8]{inputenc}
\usepackage{url}
\usepackage{float}
\usepackage{fontspec}
\usepackage{hyperref}
\usepackage{setspace}
\usepackage[style=numeric]{biblatex}
\usepackage{tocloft}
\usepackage{titlesec}
\usepackage[T1]{fontenc}
\usepackage[french]{babel}
\usepackage{graphicx}
\usepackage{listings}
\usepackage{xcolor}
\usepackage[a4paper, portrait, margin=1.45cm]{geometry}
\title{Titre du mémoire}
\author{Nom et prénom de l'auteur}
\date{\today}
% Set parameters
\setcounter{page}{0}
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\def\cftdotsep{1}
\cftsetpnumwidth{1em}
\renewcommand{\cftchapafterpnum}{\vspace{\cftbeforechapskip}}

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! LaTeX Error: Missing \begin{document}.
See the LaTeX manual or LaTeX Companion for explanation.
Type H <return> for immediate help.
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l.26 \Large
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The control sequence at the end of the top line
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See the LaTeX manual or LaTeX Companion for explanation.
Type H <return> for immediate help.
...Break there is probably something wrong with the class file.^^J^^JSee the LaTeX manual or LaTeX Companion for explanation.^^JType H <return> for immediate help\@err@
l.32 \normalsize
{Adrien Bourmault\\(\href{mailto:adrien.bourmault@etu.upmc.fr}{adrien.bourmault@etu.upmc.fr})}
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! Undefined control sequence.
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See the LaTeX manual or LaTeX Companion for explanation.
Type H <return> for immediate help.
...Break there is probably something wrong with the class file.^^J^^JSee the LaTeX manual or LaTeX Companion for explanation.^^JType H <return> for immediate help\@err@
l.36 \normalsize
{Enseignant : Daniela GENIUS}
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Chapitre 1.
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\chapter{Compléments d'architecture RISC}
On va notamment s'intéresser au traitement des interruptions et exceptions. Nous l'étudierons à travers MIPS32.
\section{Rappels}
On a vu en M1 les registres visibles par le logiciel et les mécanismes d'adressage mémoire. \newline
\newline
Ce qui avait été ignoré est le mécanisme d'interruptions et exceptions ainsi que le jeu d'instructions système.
\section{Instructions systèmes}
\subsection{Syscall}
Cette instruction permet d'appeler un service du système d'exploitation. C'est une instruction de format R. \newline
\newline
En effet, le système d'exploitation est là pour gérer le matériel et en distribuer les ressources au logiciel. Pourquoi ça existe ? Parceque gérer mal le matériel peut le détruire. \newline
\newline
Comment le système sait quel service est demandé ? Il y a l'ABI : une convention d'appel pour passer des paramètres à l'instruction \texttt{syscall}. En MIPS, on met le numéro identifiant le service demandé dans le registre \texttt{r2}.
\subsection{Break}
C'est basiquement un \texttt{syscall} spécialisé pour les logiciels de débogage (comme \texttt{gdb}). \newline
\newline
Note : en RISC on peut insérer un break à la place de n'importe quelle instruction sans détruire le programme car toutes les instructions font la même taille. Pour que cette instruction soit quand même exécutée, c'est le débogueur qui va l'exécuter séparément du programme. \newline
\newline
L'instruction est de format R.
\subsection{Eret}
C'est l'instruction \textbf{privilégiée} qui permet de quitter le vecteur d'interruption/exception et on ne peut exécuter cette instruction qu'en mode système. C'est une instruction de format R*, c'est à dire un format spécial.
\subsection{Le registre STATUS}
C'est le registre de contrôle du processeur. Il y a différentes sections et notamment \texttt{mode} qui indique le mode (S/U) et la raison du passage en S s'il y a lieu.
\subsection{Mfc0}
C'est l'instruction \textbf{privilégiée} qui permet de récupérer le contenu d'un registre du coprocesseur 0 vers un registre général. C'est une instruction de format I*.
\subsection{Wait}
C'est l'instruction \textbf{privilégiée} qui permet de stopper le pipeline jusqu'à ce qu'une interruption soit reçue. Cette instruction permet d'éviter de consommer de l'énergie (excepté pour l'horloge qui consomme toujours un petit peu).\newline
\newline
La formule de la consommation est $E=\frac{1}{2}CV^{2}\alpha$ avec \textit{C} la capacité, \textit{V} TODO et $\alpha$ l'activité du signal.
\subsection{Teqi, Tlge, Tgeiu, etc}
Ces instructions \textbf{privilégiées} sont des appels système conditionnels. C'est une instruction de format I*.
\subsection{Concernant la mémoire}
Il y a aussi énormément d'instructions mémoires que nous n'avions pas étudiées. Elles seront détaillées dans les diapos fournies en annexe.
\section{Exceptions, interruptions et reset}
Ces mécanismes ne sont pas liés à l'exécution des instructions mais au contrôle général du processeur.
\subsection{Reset}
Il s'agit de réinitialiser tous les composants de la machine. Cela a pour effet :
\begin{itemize}
\item d'annuler l'exécution du programme courant ;
\item effacer la mémoire totalement ;
\item tous les programmes courants sont perdus (y compris l'OS).
\end{itemize}
Pour ce faire, cette instruction consiste en un saut vers un programme spécifique en mémoire nommé \textit{Reset Handler}. L'algorithme de ce programme est le suivant :
\begin{itemize}
\item initialiser l'adresse de la prochaine instruction à \texttt{0xBFC0 0000} ;
\item initialiser le registre STATUS à la valeur \texttt{0x0040 0004} i.e avec le champ \textit{mode} à \texttt{00 10} ;
\item initialiser le registre CAUSE à la valeur \texttt{0x0000 0000} ;
\item sauvegarde de l'adresse de retour dans EEPC (pour le reset à chaud) ;
\item initialiser le registre EBASE (Exception Base register) à \texttt{0x8000 0000}.
\end{itemize}
A l'adresse \texttt{0xBFC0 0000} se trouve un système d'exploitation simple permettant de traiter les interruptions urgentes.
\subsection{Interruptions et exceptions}
La différence entre les deux est importante. L'interruption est un évènement qui nécessite que le processeur effectue une opération. Une exception est un évènement qui indique un dysfonctionnement d'un programme ou de la machine et qui requiert l'intervention du processeur. \newline
\newline
Ainsi, les interruptions sont des évènements normaux alors que les exceptions ne devraient pas arriver... ;)
\subsubsection{Interruptions}
L'instruction \texttt{interrupt} déclenche une interruption. Cela se fait en sautant au vecteur d'interruption à l'adresse \texttt{EXH-ADR} puis en retournant au code courant pointé par le registre \texttt{EPC}. Ce mécanisme est détaillé dans les diapos en annexe. \newline
\newline
Pendant les sauvegardes et les restaurations de contexte, aucune interruption n'est traitée (en utilisant les masques). \newline
\newline
Pour revenir d'une interruption qui se produit pendant un branchement, on est obligé de ré-exécuter le branchement (sinon le \textit{delayed slot} n'est pas exécuté correctement). On initialise donc dans le registre CAUSE le bit adéquat pour le signaler (Branch Delayed Slot).
\subsubsection{Exceptions}
Le principe est que lorsqu'une erreur se produit dans l'exécution d'un programme, une exception se produit et l'\textit{Exception Handler} décide soit de tuer le programme, soit de revenir au programme. \newline
\newline
Pour préserver l'intégrité du système, l'instruction fautive ne doit pas être exécutée. Mais comment alors savoir qu'elle est illégale ? \newline
\newline
Le mécanisme est détaillé dans les diapos en annexe. Il y a beaucoup de causes d'exception, détaillées également au même endroit. \newline
\newline
Fun-fact : l'instruction \texttt{syscall} déclenche une exception, ce qui veut dire que \texttt{syscall} est une instruction du jeu d'instruction que le processeur n'a pas le droit d'exécuter ?! En fait dès que le mécanisme est en place, exécuter l'instruction n'a pas de sens (elle ne fait rien que déclencher l'exception). C'est la même chose pour les \texttt{trap} et \texttt{break}.
%% First chapter
%\chapter{Introduction}
%
%Blablabla
%
%\begin{figure}[h!]
% \center
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\chapter{Compléments d'architecture RISC}
On va notamment s'intéresser au traitement des interruptions et exceptions. Nous l'étudierons à travers MIPS32.
\section{Rappels}
On a vu en M1 les registres visibles par le logiciel et les mécanismes d'adressage mémoire. \newline
\newline
Ce qui avait été ignoré est le mécanisme d'interruptions et exceptions ainsi que le jeu d'instructions système.
\section{Instructions systèmes}
\subsection{Syscall}
Cette instruction permet d'appeler un service du système d'exploitation. C'est une instruction de format R. \newline
\newline
En effet, le système d'exploitation est là pour gérer le matériel et en distribuer les ressources au logiciel. Pourquoi ça existe ? Parceque gérer mal le matériel peut le détruire. \newline
\newline
Comment le système sait quel service est demandé ? Il y a l'ABI : une convention d'appel pour passer des paramètres à l'instruction \texttt{syscall}. En MIPS, on met le numéro identifiant le service demandé dans le registre \texttt{r2}.
\subsection{Break}
C'est basiquement un \texttt{syscall} spécialisé pour les logiciels de débogage (comme \texttt{gdb}). \newline
\newline
Note : en RISC on peut insérer un break à la place de n'importe quelle instruction sans détruire le programme car toutes les instructions font la même taille. Pour que cette instruction soit quand même exécutée, c'est le débogueur qui va l'exécuter séparément du programme. \newline
\newline
L'instruction est de format R.
\subsection{Eret}
C'est l'instruction \textbf{privilégiée} qui permet de quitter le vecteur d'interruption/exception et on ne peut exécuter cette instruction qu'en mode système. C'est une instruction de format R*, c'est à dire un format spécial.
\subsection{Le registre STATUS}
C'est le registre de contrôle du processeur. Il y a différentes sections et notamment \texttt{mode} qui indique le mode (S/U) et la raison du passage en S s'il y a lieu.
\subsection{Mfc0}
C'est l'instruction \textbf{privilégiée} qui permet de récupérer le contenu d'un registre du coprocesseur 0 vers un registre général. C'est une instruction de format I*.
\subsection{Wait}
C'est l'instruction \textbf{privilégiée} qui permet de stopper le pipeline jusqu'à ce qu'une interruption soit reçue. Cette instruction permet d'éviter de consommer de l'énergie (excepté pour l'horloge qui consomme toujours un petit peu).\newline
\newline
La formule de la consommation est $E=\frac{1}{2}CV^{2}\alpha$ avec \textit{C} la capacité, \textit{V} TODO et $\alpha$ l'activité du signal.
\subsection{Teqi, Tlge, Tgeiu, etc}
Ces instructions \textbf{privilégiées} sont des appels système conditionnels. C'est une instruction de format I*.
\subsection{Concernant la mémoire}
Il y a aussi énormément d'instructions mémoires que nous n'avions pas étudiées. Elles seront détaillées dans les diapos fournies en annexe.
\section{Exceptions, interruptions et reset}
Ces mécanismes ne sont pas liés à l'exécution des instructions mais au contrôle général du processeur.
\subsection{Reset}
Il s'agit de réinitialiser tous les composants de la machine. Cela a pour effet :
\begin{itemize}
\item d'annuler l'exécution du programme courant ;
\item effacer la mémoire totalement ;
\item tous les programmes courants sont perdus (y compris l'OS).
\end{itemize}
Pour ce faire, cette instruction consiste en un saut vers un programme spécifique en mémoire nommé \textit{Reset Handler}. L'algorithme de ce programme est le suivant :
\begin{itemize}
\item initialiser l'adresse de la prochaine instruction à \texttt{0xBFC0 0000} ;
\item initialiser le registre STATUS à la valeur \texttt{0x0040 0004} i.e avec le champ \textit{mode} à \texttt{00 10} ;
\item initialiser le registre CAUSE à la valeur \texttt{0x0000 0000} ;
\item sauvegarde de l'adresse de retour dans EEPC (pour le reset à chaud) ;
\item initialiser le registre EBASE (Exception Base register) à \texttt{0x8000 0000}.
\end{itemize}
A l'adresse \texttt{0xBFC0 0000} se trouve un système d'exploitation simple permettant de traiter les interruptions urgentes.
\subsection{Interruptions et exceptions}
La différence entre les deux est importante. L'interruption est un évènement qui nécessite que le processeur effectue une opération. Une exception est un évènement qui indique un dysfonctionnement d'un programme ou de la machine et qui requiert l'intervention du processeur. \newline
\newline
Ainsi, les interruptions sont des évènements normaux alors que les exceptions ne devraient pas arriver... ;)
\subsubsection{Interruptions}
L'instruction \texttt{interrupt} déclenche une interruption. Cela se fait en sautant au vecteur d'interruption à l'adresse \texttt{EXH-ADR} puis en retournant au code courant pointé par le registre \texttt{EPC}. Ce mécanisme est détaillé dans les diapos en annexe. \newline
\newline
Pendant les sauvegardes et les restaurations de contexte, aucune interruption n'est traitée (en utilisant les masques). \newline
\newline
Pour revenir d'une interruption qui se produit pendant un branchement, on est obligé de ré-exécuter le branchement (sinon le \textit{delayed slot} n'est pas exécuté correctement). On initialise donc dans le registre CAUSE le bit adéquat pour le signaler (Branch Delayed Slot).
\subsubsection{Exceptions}
Le principe est que lorsqu'une erreur se produit dans l'exécution d'un programme, une exception se produit et l'\textit{Exception Handler} décide soit de tuer le programme, soit de revenir au programme. \newline
\newline
Pour préserver l'intégrité du système, l'instruction fautive ne doit pas être exécutée. Mais comment alors savoir qu'elle est illégale ? \newline
\newline
Le mécanisme est détaillé dans les diapos en annexe. Il y a beaucoup de causes d'exception, détaillées également au même endroit. \newline
\newline
Fun-fact : l'instruction \texttt{syscall} déclenche une exception, ce qui veut dire que \texttt{syscall} est une instruction du jeu d'instruction que le processeur n'a pas le droit d'exécuter ?! En fait dès que le mécanisme est en place, exécuter l'instruction n'a pas de sens (elle ne fait rien que déclencher l'exception). C'est la même chose pour les \texttt{trap} et \texttt{break}.
%% First chapter
%\chapter{Introduction}
%
%Blablabla
%
%\begin{figure}[h!]
% \center
% \includegraphics{images/su.png}
% \caption{Petite image}
% \label{fig:schema1}
%\end{figure}
%
%\setstretch{1}
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%Blablabla.
%
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%\setstretch{1.3}
%
%Bla à propos de l'\textbf{bla important} dont le fonctionnement est schématisé dans la figure \ref{fig:schema1}.
%
%% Second chapter
%\chapter{Seconde chose à dire}
%
%A ce propos \textit{italique}.
%
%\begin{figure}[h!]
% \center
% \includegraphics[width=\linewidth]{images/su.png}
% \caption{Image pleine page}
% \label{fig:image_pleine}
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%
%\setstretch{1}
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%
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\printbibliography
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\contentsline {section}{\numberline {1.1}Rappels}{2}{section.1.1}%
\contentsline {section}{\numberline {1.2}Instructions systèmes}{2}{section.1.2}%
\contentsline {subsection}{\numberline {1.2.1}Syscall}{2}{subsection.1.2.1}%
\contentsline {subsection}{\numberline {1.2.2}Break}{2}{subsection.1.2.2}%
\contentsline {subsection}{\numberline {1.2.3}Eret}{2}{subsection.1.2.3}%
\contentsline {subsection}{\numberline {1.2.4}Le registre STATUS}{3}{subsection.1.2.4}%
\contentsline {subsection}{\numberline {1.2.5}Mfc0}{3}{subsection.1.2.5}%
\contentsline {subsection}{\numberline {1.2.6}Wait}{3}{subsection.1.2.6}%
\contentsline {subsection}{\numberline {1.2.7}Teqi, Tlge, Tgeiu, etc}{3}{subsection.1.2.7}%
\contentsline {subsection}{\numberline {1.2.8}Concernant la mémoire}{3}{subsection.1.2.8}%
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Faculté des Sciences et Ingénierie\\
Master Informatique\\
Systèmes Électroniques, Systèmes Informatiques
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Chapitre 1.
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\chapter*{Organisation}
Pas de projet, pas de partiel: la notation se fait avec un examen final (50\%) et un exposé (50\%), dont la soutenance aura lieu dix jours après l'examen.
\chapter{Fonctionnement interne de git}
\section{Introduction}
Pourquoi git ? C'est l'outil N°1 pour la gestion de version et de projet décentralisé. Ce logiciel permet d'avoir un historique sur les fichiers, de maintenir des branches alternatives. Le fait qu'il soit décentralisé, contrairement à SVN et CVS, implique une gestion de la cohérence sur l'historique. \newline
\newline
L'intérêt de ce cours est d'étudier le fonctionnement interne de git.
\section{Principes de base}
Tous les mécanismes de git reposent sur les diff/patchs et
\subsection{Patchs et diffs}
Un diff est une comparaison ligne à ligne de fichiers. Le patch est l'utilisation d'un diff pour faire évoluer un fichier et passer à une nouvelle version.
\subsection{Notion d'historique}
\subsubsection{Définition : historique}
On appelle historique un graphe orienté acyclique composé de version re-calculables à partir des versions adjacentes. \newline
\newline
Rappel : un arbre est un graphe connexe acyclique non orienté. L'historique n'est pas un arbre car il est orienté.
\subsubsection{Définition : branche}
On appelle branche de version $v_{i}$ d'un historique le sous-graphe composé de l'ensemble des noeuds adjacents.
\subsubsection{Définition : tronc}
Le tronc ou branche principale est définie selon le contexte.
\subsubsection{\#BalanceTonDépôt}
Depuis le 1er octobre 2020, la branche principale des dépôts créés sur les plateforme est nommée main au lieu de master. \newline
\newline
Le logiciel git émet un avertissement lors du git init.
\subsubsection{Définition : sous-branche}
Toute branche d'un noeud non incluse dans une autre branche est nommée sous-branche.
\subsubsection{Définition : merge}
Tout noeud du graphe ayant un degré sortant strictement supérieur à 1 est un merge (ou noeud de fusion).
\section{Historique}
\begin{itemize}
\item 2001 : Linux est développé sur CVS
\item 2002 - 2005 : Linux est développé sur Bitkeeper
\item 6 avril 2005 : Bitkeeper quitte le libre et Torvalds commence git
\item 18 avril 2005 : git sait merge
\item 16 juin 2005 : Linux développé officiellement sur git
\item 14 février 2007 : Sortie de la version 1.5.0
\end{itemize}
\section{Architecture interne}
À l'origine, git était destiné à constituer un système de fichiers !
\subsection{Création d'un dépôt}
À la création d'un dépôt, un répertoire .git est créé. \newline
\newline
Sur un serveur, une autre méthode est possible : il n'y a besoin que de l'historique (et pas des fichiers eux-mêmes). L'option faite pour cela est \texttt{--bare}
\subsection{Les objets : tout est blob}
Le système de git est conçu comme un système de fichiers versionnés. Linus Torvalds reprend les concepts de Linux :
\begin{itemize}
\item tout est fichier -> tout est blob ;
\item fichiers identifiés par numéro d'inode -> blobs identifiés par SHA-1 de leur contenu. \newline
\end{itemize}
L'identification par \textit{hash} n'est possible que si le contenu est fixe : un blob est immuable, entraînant une réduction de la taille des dépôts par déduplication !
\subsubsection{SHA-1}
C'est une fonction cryptographique conçue par la NSA, limitée à des fichiers de 2 exaoctets, retournant un \textit{hash} sur 160 bits noté avec 2 + 38 caractères hexadécimaux. \newline
\newline
Note : bien que largement vulnérable aux collisions, SHA-1 ne pose pas de problèmes pour les fichiers de texte a priori (probabilité de $\frac{1}{2^{160}}$ ). \newline
\newline
Note : pour vérifier l'intégrité, la commande \texttt{git fsck} est utile ! \newline
\newline
\subsection{Types d'objets}
\subsubsection{Blob}
C'est l'élement de base du stockage. Il est identifié par le SHA-1, stocké dans le dépôt sous \texttt{.git/objects/XX/YYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYY} sous la forme \texttt{"blob <taille de contenu>\textbackslash 0<contenu>"} \newline
\newline
Les blobs sont compressés avec la zlib. Le SHA-1 est calculé sur le blob et non sur le contenu !
\subsubsection{Trees}
Ce sont des blobs. Ils stockent la liste des pointeurs vers des blobs et d'autres trees en associant un nom à chaque pointeur. Un ensemble de trees permet de décrire l'état d'une hiérarchie de blobs. \newline
\newline
\subsubsection{Commits}
Un commit est l'enregistrement d'une nouvelle version de fichiers. Auparavant, dans CVS par exemple, on utilise la numération des patchs fichier par fichier (deltas, on a donc pas d'état global et ça oblige à ajouter des tags pour retrouver un état cohérent, l'accès à une version spécifique nécessite de ré-appliquer les patchs). Dans SVN, chaque numéro correspond à un état global cohérent mais là aussi il faut ré-appliquer les patchs. \newline
\newline
La résolution de ce problème par git consiste à numéroter globalement tous les fichiers, puisque la déduplication rend l'opération atomique.
Ce sont des blobs. Ils un pointeur vers un tree dont on veut sauver l'état, un pointeur vers un ou plusieurs autre commits pour constituer un historique, et également le nom d'un auteur et d'un committeur, puis une description sous forme d'une chaîne de caractère. \newline
\newline
\textbf{ATTENTION :} les blobs de commit contiennent des références de date en notation Epoch, rendant le hash liée à la date de création du commit. Ainsi même avec les mêmes fichiers et les mêmes modifications, personne n'aura le même hash de commit sauf à l'effectuer exactement au même moment.
\subsubsection{Tags}
Ce sont des blobs. Ils contiennent un pointeur vers un blob, un tree ou un commit, ainsi qu'une signature.
\section{Architecture générale}
\subsection{Commandes}
Ce logiciel est conçu avec la philosophie Unix des commandes. Ainsi, chaque commande git a son propre binaire ! Il y a 145 commandes, dont 19 sont dédiées au dépôts locaux, 5 pour les dépôts distants, et quelques autres pour gérer les conflits et les recherches d'erreurs.
\subsection{Exemple simple}
Lors de la création d'un projet, on utilise \texttt{git init} pour créer l'enveloppe du dépôt. Ensuite on ajoute un ou des fichiers avec \texttt{git add} crée un ou des blobs liés à un tree. En utilisant \texttt{git commit} on obtient alors un commit. \newline
\newline
L'état courant est indiqué par \texttt{head} et l'index pointe vers le tree pointé par le commit pointé par \texttt{head}. \newline
\newline
On remarque facilement que la structure de git a inspiré la \textit{blockchain}.
\subsection{Branches et fusion}
Pour manipuler les branches on a :
\begin{itemize}
\item branch : liste les branches avec une * pour la branche active ;
\item branch <nom> : créé une nouvelle branche <nom> ;
\item branch -m : permet de renommer une branche ;
\item branch -d : permet de supprimer une branche ;
\item switch : permet de changer de branche active ;
\item switch -c : créé une branche et l'active ;
\item show-branch : affiche les branches et leur commits.
\end{itemize}
Créer une branche, c'est créer un pointeur vers un commit (comme un tag !). Si on réalise un commit sur une branche, on va créer un historique et la référence à la branche se déplacera. \newline
\newline
Note : une bonne pratique est de créer une branche à chaque séance de travail et la fusionner (\textit{fast-forward} !) en fin de session de travail. \newline
\newline
La fusion en \textit{fast-forward} est atomique (on déplace le pointeur de la branche). Par contre, si cela n'est pas possible parcequ'on a deux branches parallèles impliquées, il faut créer un nouveau commit dit \textit{commit de fusion}. Pourtant, les modifications dans ces deux branches sont probablement indépendantes ! La solution : \texttt{git rebase}. \newline
\newline
Le \textit{rebase} est une transposition d'un commit de sa base initiale à une nouvelle base. Lors de cette transposition, de nouveaux commits sont créés. Les précédents ne sont pas effacés, sauf après utilisation de \texttt{git gc} (après 7 jours parceque Torvalds sait que les programmeurs sont des boulets). \newline
\newline
\subsection{Les remords}
On a trois types de correction :
\begin{itemize}
\item revert : pour annuler un commit ;
\item amend : modifier le dernier commit ;
\item reset : rétablir la situation d'un ancien commit.
\end{itemize}
Le revert et le amend sont assez simples à comprendre. \newline
\newline
Pour reset, on a trois modes \texttt{--hard} (restaure les fichiers tels qu'ils étaient avant), normal (laisse les fichiers modifiés dans leur état, non suivis) et \texttt{--soft} (laisse les fichiers modifiés dans leur état dans l'index, prêts à commit).
\subsection{Utilisation de l'historique}
La commande \texttt{git diff} permet de travailler sur l'index lui-même. On peut notamment obtenir les différences entre le répertoire de travail et l'index, \texttt{head} et l'index etc. \newline
\newline
La commande \texttt{git show} donne le diff sous forme d'un patch (pour un commit).
\section{Décentralisation}
\subsection{Dépôts centralisés vs décentralisés}
Contrairement à SVN ou CVS, git est décentralisé. Cela signifie qu'il y a deux actions pour pousser une modification et également deux actions pour récupérer les modifications. De façon intéressante, \texttt{git pull} est la fusion entre \texttt{git fetch} et \texttt{git merge}. En tout cas, git permet de versionner localement et sans connexion internet avec un accès complet au passé.
\subsection{Gestion des conflits}
Le logiciel git permet de gérer les conflits localement lors des fusions, contrairement à SVN ou CVS qui rencontraient les conflits dès la récupération des modifications.
\subsection{Vue de la branche distance}
Sur un dépôt local, lors d'un clonage, le dépôt local contient une branche locale ainsi que la vue de la branche distante (généralement préfixée par \textit{origin}).
%% First chapter
%\chapter{Introduction}
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%\chapter{Seconde chose à dire}
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% \center
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\input{packages.tex}
\newcounter{mypara}
\setcounter{mypara}{0}
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%Bibliography
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\sloppy
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% Table of contents
\tableofcontents
\newpage
\chapter*{Organisation}
Pas de projet, pas de partiel: la notation se fait avec un examen final (50\%) et un exposé (50\%), dont la soutenance aura lieu dix jours après l'examen.
\chapter{Fonctionnement interne de git}
\section{Introduction}
Pourquoi git ? C'est l'outil N°1 pour la gestion de version et de projet décentralisé. Ce logiciel permet d'avoir un historique sur les fichiers, de maintenir des branches alternatives. Le fait qu'il soit décentralisé, contrairement à SVN et CVS, implique une gestion de la cohérence sur l'historique. \newline
\newline
L'intérêt de ce cours est d'étudier le fonctionnement interne de git.
\section{Principes de base}
Tous les mécanismes de git reposent sur les diff/patchs et
\subsection{Patchs et diffs}
Un diff est une comparaison ligne à ligne de fichiers. Le patch est l'utilisation d'un diff pour faire évoluer un fichier et passer à une nouvelle version.
\subsection{Notion d'historique}
\subsubsection{Définition : historique}
On appelle historique un graphe orienté acyclique composé de version re-calculables à partir des versions adjacentes. \newline
\newline
Rappel : un arbre est un graphe connexe acyclique non orienté. L'historique n'est pas un arbre car il est orienté.
\subsubsection{Définition : branche}
On appelle branche de version $v_{i}$ d'un historique le sous-graphe composé de l'ensemble des noeuds adjacents.
\subsubsection{Définition : tronc}
Le tronc ou branche principale est définie selon le contexte.
\subsubsection{\#BalanceTonDépôt}
Depuis le 1er octobre 2020, la branche principale des dépôts créés sur les plateforme est nommée main au lieu de master. \newline
\newline
Le logiciel git émet un avertissement lors du git init.
\subsubsection{Définition : sous-branche}
Toute branche d'un noeud non incluse dans une autre branche est nommée sous-branche.
\subsubsection{Définition : merge}
Tout noeud du graphe ayant un degré sortant strictement supérieur à 1 est un merge (ou noeud de fusion).
\section{Historique}
\begin{itemize}
\item 2001 : Linux est développé sur CVS
\item 2002 - 2005 : Linux est développé sur Bitkeeper
\item 6 avril 2005 : Bitkeeper quitte le libre et Torvalds commence git
\item 18 avril 2005 : git sait merge
\item 16 juin 2005 : Linux développé officiellement sur git
\item 14 février 2007 : Sortie de la version 1.5.0
\end{itemize}
\section{Architecture interne}
À l'origine, git était destiné à constituer un système de fichiers !
\subsection{Création d'un dépôt}
À la création d'un dépôt, un répertoire .git est créé. \newline
\newline
Sur un serveur, une autre méthode est possible : il n'y a besoin que de l'historique (et pas des fichiers eux-mêmes). L'option faite pour cela est \texttt{--bare}
\subsection{Les objets : tout est blob}
Le système de git est conçu comme un système de fichiers versionnés. Linus Torvalds reprend les concepts de Linux :
\begin{itemize}
\item tout est fichier -> tout est blob ;
\item fichiers identifiés par numéro d'inode -> blobs identifiés par SHA-1 de leur contenu. \newline
\end{itemize}
L'identification par \textit{hash} n'est possible que si le contenu est fixe : un blob est immuable, entraînant une réduction de la taille des dépôts par déduplication !
\subsubsection{SHA-1}
C'est une fonction cryptographique conçue par la NSA, limitée à des fichiers de 2 exaoctets, retournant un \textit{hash} sur 160 bits noté avec 2 + 38 caractères hexadécimaux. \newline
\newline
Note : bien que largement vulnérable aux collisions, SHA-1 ne pose pas de problèmes pour les fichiers de texte a priori (probabilité de $\frac{1}{2^{160}}$ ). \newline
\newline
Note : pour vérifier l'intégrité, la commande \texttt{git fsck} est utile ! \newline
\newline
\subsection{Types d'objets}
\subsubsection{Blob}
C'est l'élement de base du stockage. Il est identifié par le SHA-1, stocké dans le dépôt sous \texttt{.git/objects/XX/YYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYY} sous la forme \texttt{"blob <taille de contenu>\textbackslash 0<contenu>"} \newline
\newline
Les blobs sont compressés avec la zlib. Le SHA-1 est calculé sur le blob et non sur le contenu !
\subsubsection{Trees}
Ce sont des blobs. Ils stockent la liste des pointeurs vers des blobs et d'autres trees en associant un nom à chaque pointeur. Un ensemble de trees permet de décrire l'état d'une hiérarchie de blobs. \newline
\newline
\subsubsection{Commits}
Un commit est l'enregistrement d'une nouvelle version de fichiers. Auparavant, dans CVS par exemple, on utilise la numération des patchs fichier par fichier (deltas, on a donc pas d'état global et ça oblige à ajouter des tags pour retrouver un état cohérent, l'accès à une version spécifique nécessite de ré-appliquer les patchs). Dans SVN, chaque numéro correspond à un état global cohérent mais là aussi il faut ré-appliquer les patchs. \newline
\newline
La résolution de ce problème par git consiste à numéroter globalement tous les fichiers, puisque la déduplication rend l'opération atomique.
Ce sont des blobs. Ils un pointeur vers un tree dont on veut sauver l'état, un pointeur vers un ou plusieurs autre commits pour constituer un historique, et également le nom d'un auteur et d'un committeur, puis une description sous forme d'une chaîne de caractère. \newline
\newline
\textbf{ATTENTION :} les blobs de commit contiennent des références de date en notation Epoch, rendant le hash liée à la date de création du commit. Ainsi même avec les mêmes fichiers et les mêmes modifications, personne n'aura le même hash de commit sauf à l'effectuer exactement au même moment.
\subsubsection{Tags}
Ce sont des blobs. Ils contiennent un pointeur vers un blob, un tree ou un commit, ainsi qu'une signature.
\section{Architecture générale}
\subsection{Commandes}
Ce logiciel est conçu avec la philosophie Unix des commandes. Ainsi, chaque commande git a son propre binaire ! Il y a 145 commandes, dont 19 sont dédiées au dépôts locaux, 5 pour les dépôts distants, et quelques autres pour gérer les conflits et les recherches d'erreurs.
\subsection{Exemple simple}
Lors de la création d'un projet, on utilise \texttt{git init} pour créer l'enveloppe du dépôt. Ensuite on ajoute un ou des fichiers avec \texttt{git add} crée un ou des blobs liés à un tree. En utilisant \texttt{git commit} on obtient alors un commit. \newline
\newline
L'état courant est indiqué par \texttt{head} et l'index pointe vers le tree pointé par le commit pointé par \texttt{head}. \newline
\newline
On remarque facilement que la structure de git a inspiré la \textit{blockchain}.
\subsection{Branches et fusion}
Pour manipuler les branches on a :
\begin{itemize}
\item branch : liste les branches avec une * pour la branche active ;
\item branch <nom> : créé une nouvelle branche <nom> ;
\item branch -m : permet de renommer une branche ;
\item branch -d : permet de supprimer une branche ;
\item switch : permet de changer de branche active ;
\item switch -c : créé une branche et l'active ;
\item show-branch : affiche les branches et leur commits.
\end{itemize}
Créer une branche, c'est créer un pointeur vers un commit (comme un tag !). Si on réalise un commit sur une branche, on va créer un historique et la référence à la branche se déplacera. \newline
\newline
Note : une bonne pratique est de créer une branche à chaque séance de travail et la fusionner (\textit{fast-forward} !) en fin de session de travail. \newline
\newline
La fusion en \textit{fast-forward} est atomique (on déplace le pointeur de la branche). Par contre, si cela n'est pas possible parcequ'on a deux branches parallèles impliquées, il faut créer un nouveau commit dit \textit{commit de fusion}. Pourtant, les modifications dans ces deux branches sont probablement indépendantes ! La solution : \texttt{git rebase}. \newline
\newline
Le \textit{rebase} est une transposition d'un commit de sa base initiale à une nouvelle base. Lors de cette transposition, de nouveaux commits sont créés. Les précédents ne sont pas effacés, sauf après utilisation de \texttt{git gc} (après 7 jours parceque Torvalds sait que les programmeurs sont des boulets). \newline
\newline
\subsection{Les remords}
On a trois types de correction :
\begin{itemize}
\item revert : pour annuler un commit ;
\item amend : modifier le dernier commit ;
\item reset : rétablir la situation d'un ancien commit.
\end{itemize}
Le revert et le amend sont assez simples à comprendre. \newline
\newline
Pour reset, on a trois modes \texttt{--hard} (restaure les fichiers tels qu'ils étaient avant), normal (laisse les fichiers modifiés dans leur état, non suivis) et \texttt{--soft} (laisse les fichiers modifiés dans leur état dans l'index, prêts à commit).
\subsection{Utilisation de l'historique}
La commande \texttt{git diff} permet de travailler sur l'index lui-même. On peut notamment obtenir les différences entre le répertoire de travail et l'index, \texttt{head} et l'index etc.
La commande \texttt{git show} donne le diff sous forme d'un patch (pour un commit).
\section{Décentralisation}
\subsection{Dépôts centralisés vs décentralisés}
Contrairement à SVN ou CVS, git est décentralisé. Cela signifie qu'il y a deux actions pour pousser une modification et également deux actions pour récupérer les modifications. De façon intéressante, \texttt{git pull} est la fusion entre \texttt{git fetch} et \texttt{git merge}. En tout cas, git permet de versionner localement et sans connexion internet avec un accès complet au passé.
\subsection{Gestion des conflits}
%% First chapter
%\chapter{Introduction}
%
%Blablabla
%
%\begin{figure}[h!]
% \center
% \includegraphics{images/su.png}
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% \label{fig:schema1}
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%
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%\chapter{Seconde chose à dire}
%
%A ce propos \textit{italique}.
%
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% \center
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\babel@toc {french}{}\relax
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\contentsline {section}{\numberline {1.1}Introduction}{3}{section.1.1}%
\contentsline {section}{\numberline {1.2}Principes de base}{3}{section.1.2}%
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\contentsline {section}{\numberline {1.4}Architecture interne}{4}{section.1.4}%
\contentsline {subsection}{\numberline {1.4.1}Création d'un dépôt}{4}{subsection.1.4.1}%
\contentsline {subsection}{\numberline {1.4.2}Les objets : tout est blob}{4}{subsection.1.4.2}%
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\contentsline {subsection}{\numberline {1.5.4}Les remords}{6}{subsection.1.5.4}%
\contentsline {subsection}{\numberline {1.5.5}Utilisation de l'historique}{7}{subsection.1.5.5}%
\contentsline {section}{\numberline {1.6}Décentralisation}{7}{section.1.6}%
\contentsline {subsection}{\numberline {1.6.1}Dépôts centralisés vs décentralisés}{7}{subsection.1.6.1}%
\contentsline {subsection}{\numberline {1.6.2}Gestion des conflits}{7}{subsection.1.6.2}%
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Faculté des Sciences et Ingénierie\\
Master Informatique\\
Systèmes Électroniques, Systèmes Informatiques
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Blablabla
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Bla à propos de l'\textbf{bla important} dont le fonctionnement est schématisé dans la figure \ref{fig:schema1}.
% Second chapter
\chapter{Seconde chose à dire}
A ce propos \textit{italique}.
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% Titlepage
\begin{titlepage}
\begin{center}
\scalebox{1}{\includegraphics{images/su.png}}
\end{center}
\vspace{0.5 cm}
\begin{center}
Faculté des Sciences et Ingénierie\\
Master Informatique\\
Systèmes Électroniques, Systèmes Informatiques
\end{center}
\vspace{3.0 cm}
\begin{center}
\Huge{{Template}}
\end{center}
\vspace{0.1 cm}
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\Large{Sous-titre du template}
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\normalsize{Adrien Bourmault\\(\href{mailto:adrien.bourmault@etu.upmc.fr}{adrien.bourmault@etu.upmc.fr})}
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\begin{center}
\normalsize{Enseignant : NOM PROF}
\end{center}
\vspace{1.0 cm}
\end{titlepage}

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\newacronym{Insee}{Insee}{Institut national de la statistique et des études économiques}
\newacronym{Tracfin}{Tracfin}{Traitement du renseignement et action contre les circuits financiers clandestins}

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% -*- coding: utf-8 -*-
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\usepackage[utf8]{inputenc}
\usepackage{url}
\usepackage{float}
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\usepackage{hyperref}
\usepackage{setspace}
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\usepackage{titlesec}
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\usepackage[french]{babel}
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\usepackage{listings}
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\usepackage[a4paper, portrait, margin=1.45cm]{geometry}
\title{Titre du mémoire}
\author{Nom et prénom de l'auteur}
\date{\today}
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\input{packages.tex}
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\sloppy
\input{titlepage.tex}
\setcounter{tocdepth}{4}
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% Table of contents
\tableofcontents
\newpage
% First chapter
\chapter{Introduction}
Blablabla
\begin{figure}[h!]
\center
\includegraphics{images/su.png}
\caption{Petite image}
\label{fig:schema1}
\end{figure}
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\section{Une section}
\setstretch{1.3}
Blabla \newline
Blablabla.
\setstretch{1}
\subsection{Une sous-section}
\setstretch{1.3}
Bla à propos de l'\textbf{bla important} dont le fonctionnement est schématisé dans la figure \ref{fig:schema1}.
% Second chapter
\chapter{Seconde chose à dire}
A ce propos \textit{italique}.
\begin{figure}[h!]
\center
\includegraphics[width=\linewidth]{images/su.png}
\caption{Image pleine page}
\label{fig:image_pleine}
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Texte pour dire tout ça parceque oui. \newline
Ceci ne veut pas dire cependant que :
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\item Élément 1
\item Élément 2
\item Élément 3
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% Titlepage
\begin{titlepage}
\begin{center}
\scalebox{1}{\includegraphics{images/su.png}}
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\vspace{0.5 cm}
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Faculté des Sciences et Ingénierie\\
Master Informatique\\
Systèmes Électroniques, Systèmes Informatiques
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\newacronym{Insee}{Insee}{Institut national de la statistique et des études économiques}
\newacronym{Tracfin}{Tracfin}{Traitement du renseignement et action contre les circuits financiers clandestins}

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// Adrien Bourmault 3677850
// Volodymyr Patuta
// Groupe K
#include "easypap.h"
#include <omp.h>
///////////////////////////// Sequential version (tiled)
// Suggested cmdline(s):
// ./run -l images/1024.png -k blur -v seq -si
//
// resultat -O3 : 3295.680
// resultat -O2 : 3240.540
// resultat -O1 : 3289.684
// resultat -O0 : 9681.364
//
int blur_do_tile_default (int x, int y, int width, int height)
{
for (int i = y; i < y + height; i++)
for (int j = x; j < x + width; j++) {
unsigned r = 0, g = 0, b = 0, a = 0, n = 0;
int i_d = (i > 0) ? i - 1 : i;
int i_f = (i < DIM - 1) ? i + 1 : i;
int j_d = (j > 0) ? j - 1 : j;
int j_f = (j < DIM - 1) ? j + 1 : j;
for (int yloc = i_d; yloc <= i_f; yloc++)
for (int xloc = j_d; xloc <= j_f; xloc++) {
unsigned c = cur_img (yloc, xloc);
r += extract_red (c);
g += extract_green (c);
b += extract_blue (c);
a += extract_alpha (c);
n += 1;
}
r /= n;
g /= n;
b /= n;
a /= n;
next_img (i, j) = rgba (r, g, b, a);
}
return 0;
}
int blur_do_tile_default_nb (int x, int y, int width, int height)
{
for (int i = y + 1; i < y + height - 1; i++) {
for (int j = x + 1; j < x + width - 1; j++) {
unsigned r = 0, g = 0, b = 0, a = 0, n = 0;
for (int yloc = i - 1; yloc <= i + 1; yloc++) {
for (int xloc = j - 1; xloc <= j + 1; xloc++) {
unsigned c = cur_img (yloc, xloc);
r += extract_red (c);
g += extract_green (c);
b += extract_blue (c);
a += extract_alpha (c);
n += 1;
}
}
r /= n;
g /= n;
b /= n;
a /= n;
next_img (i, j) = rgba (r, g, b, a);
}
}
for (int i = 0; i < width - 1; i++) {
next_img (i, 0) = cur_img(i, 0);
next_img (i, DIM - 1) = cur_img(i, DIM - 1);
next_img (0, i) = cur_img(0, i);
next_img (DIM - 1, i) = cur_img(DIM - 1, i);
}
return 0;
}
// resultat optim1 Denver: 7349.435
// resultat optim1 Cortex: 23348.009
// resultat nb Denver: 13512.337
// resultat nb Cortex: 27133.248
int blur_do_tile_default_optim1 (int x, int y, int width, int height)
{
for (int i = y + 1; i < y + height - 1; i++) {
for (int j = x + 1; j < x + width - 1; j++) {
unsigned r = 0, g = 0, b = 0, a = 0, n = 0;
for (int yloc = i - 1; yloc <= i + 1; yloc++) {
unsigned c = cur_img (yloc, j - 1);
r += extract_red (c);
g += extract_green (c);
b += extract_blue (c);
a += extract_alpha (c);
c = cur_img (yloc, j);
r += extract_red (c);
g += extract_green (c);
b += extract_blue (c);
a += extract_alpha (c);
c = cur_img (yloc, j + 1);
r += extract_red (c);
g += extract_green (c);
b += extract_blue (c);
a += extract_alpha (c);
n += 3;
}
r /= n;
g /= n;
b /= n;
a /= n;
next_img (i, j) = rgba (r, g, b, a);
}
}
for (int i = 0; i < width - 1; i++) {
next_img (i, 0) = cur_img(i, 0);
next_img (i, DIM - 1) = cur_img(i, DIM - 1);
next_img (0, i) = cur_img(0, i);
next_img (DIM - 1, i) = cur_img(DIM - 1, i);
}
return 0;
}
// resultat Denver: 6355.280
// resultat Cortex: 23297.872
int blur_do_tile_default_optim2 (int x, int y, int width, int height)
{
for (int i = y + 1; i < y + height - 1; i++) {
for (int j = x + 1; j < x + width - 1; j++) {
unsigned r = 0, g = 0, b = 0, a = 0, n = 0;
unsigned c = cur_img (i - 1, j - 1);
r += extract_red (c);
g += extract_green (c);
b += extract_blue (c);
a += extract_alpha (c);
c = cur_img (i - 1, j);
r += extract_red (c);
g += extract_green (c);
b += extract_blue (c);
a += extract_alpha (c);
c = cur_img (i - 1, j + 1);
r += extract_red (c);
g += extract_green (c);
b += extract_blue (c);
a += extract_alpha (c);
c = cur_img (i, j - 1);
r += extract_red (c);
g += extract_green (c);
b += extract_blue (c);
a += extract_alpha (c);
c = cur_img (i, j);
r += extract_red (c);
g += extract_green (c);
b += extract_blue (c);
a += extract_alpha (c);
c = cur_img (i, j + 1);
r += extract_red (c);
g += extract_green (c);
b += extract_blue (c);
a += extract_alpha (c);
c = cur_img (i + 1, j - 1);
r += extract_red (c);
g += extract_green (c);
b += extract_blue (c);
a += extract_alpha (c);
c = cur_img (i + 1, j);
r += extract_red (c);
g += extract_green (c);
b += extract_blue (c);
a += extract_alpha (c);
c = cur_img (i + 1, j + 1);
r += extract_red (c);
g += extract_green (c);
b += extract_blue (c);
a += extract_alpha (c);
n += 9;
r /= n;
g /= n;
b /= n;
a /= n;
next_img (i, j) = rgba (r, g, b, a);
}
}
for (int i = 0; i < width - 1; i++) {
next_img (i, 0) = cur_img(i, 0);
next_img (i, DIM - 1) = cur_img(i, DIM - 1);
next_img (0, i) = cur_img(0, i);
next_img (DIM - 1, i) = cur_img(DIM - 1, i);
}
return 0;
}
// resultat Denver: 5189.197
// resultat Cortex: 16848.161
int blur_do_tile_default_optim3 (int x, int y, int width, int height)
{
for (int i = y + 1; i < y + height - 1; i++) {
for (int j = x + 1; j < x + width - 1; j++) {
unsigned r = 0, g = 0, b = 0, a = 0, n = 0;
unsigned c = cur_img (i - 1, j - 1);
r += c >> 24;
g += (c >> 16) & 255;
b += (c >> 8) & 255;
a += c & 255;
c = cur_img (i - 1, j);
r += c >> 24;
g += (c >> 16) & 255;
b += (c >> 8) & 255;
a += c & 255;
c = cur_img (i - 1, j + 1);
r += c >> 24;
g += (c >> 16) & 255;
b += (c >> 8) & 255;
a += c & 255;
c = cur_img (i, j - 1);
r += c >> 24;
g += (c >> 16) & 255;
b += (c >> 8) & 255;
a += c & 255;
c = cur_img (i, j);
r += c >> 24;
g += (c >> 16) & 255;
b += (c >> 8) & 255;
a += c & 255;
c = cur_img (i, j + 1);
r += c >> 24;
g += (c >> 16) & 255;
b += (c >> 8) & 255;
a += c & 255;
c = cur_img (i + 1, j - 1);
r += c >> 24;
g += (c >> 16) & 255;
b += (c >> 8) & 255;
a += c & 255;
c = cur_img (i + 1, j);
r += c >> 24;
g += (c >> 16) & 255;
b += (c >> 8) & 255;
a += c & 255;
c = cur_img (i + 1, j + 1);
r += c >> 24;
g += (c >> 16) & 255;
b += (c >> 8) & 255;
a += c & 255;
n += 9;
r /= n;
g /= n;
b /= n;
a /= n;
next_img (i, j) = rgba (r, g, b, a);
}
}
for (int i = 0; i < width - 1; i++) {
next_img (i, 0) = cur_img(i, 0);
next_img (i, DIM - 1) = cur_img(i, DIM - 1);
next_img (0, i) = cur_img(0, i);
next_img (DIM - 1, i) = cur_img(DIM - 1, i);
}
return 0;
}
int blur_do_tile_default_optim4 (int x, int y, int width, int height)
{
for (int i = y + 1; i < y + height - 1; i++) {
for (int j = x + 1; j < x + width - 1; j++) {
unsigned r = 0, g = 0, b = 0, a = 0, n = 0;
unsigned c = cur_img (i - 1, j - 1);
r += c >> 24;
g += (c >> 16) & 255;
b += (c >> 8) & 255;
a += c & 255;
c = cur_img (i - 1, j);
r += c >> 24;
g += (c >> 16) & 255;
b += (c >> 8) & 255;
a += c & 255;
c = cur_img (i - 1, j + 1);
r += c >> 24;
g += (c >> 16) & 255;
b += (c >> 8) & 255;
a += c & 255;
c = cur_img (i, j - 1);
r += c >> 24;
g += (c >> 16) & 255;
b += (c >> 8) & 255;
a += c & 255;
c = cur_img (i, j);
r += c >> 24;
g += (c >> 16) & 255;
b += (c >> 8) & 255;
a += c & 255;
c = cur_img (i, j + 1);
r += c >> 24;
g += (c >> 16) & 255;
b += (c >> 8) & 255;
a += c & 255;
c = cur_img (i + 1, j - 1);
r += c >> 24;
g += (c >> 16) & 255;
b += (c >> 8) & 255;
a += c & 255;
c = cur_img (i + 1, j);
r += c >> 24;
g += (c >> 16) & 255;
b += (c >> 8) & 255;
a += c & 255;
c = cur_img (i + 1, j + 1);
r += c >> 24;
g += (c >> 16) & 255;
b += (c >> 8) & 255;
a += c & 255;
n += 9;
r /= n;
g /= n;
b /= n;
a /= n;
next_img (i, j) = rgba (r, g, b, a);
}
}
for (int i = 0; i < width - 1; i++) {
next_img (i, 0) = cur_img(i, 0);
next_img (i, DIM - 1) = cur_img(i, DIM - 1);
next_img (0, i) = cur_img(0, i);
next_img (DIM - 1, i) = cur_img(DIM - 1, i);
}
return 0;
}
///////////////////////////// Sequential version (tiled)
// Suggested cmdline(s):
// ./run -l images/1024.png -k blur -v seq
//
unsigned blur_compute_seq (unsigned nb_iter)
{
for (unsigned it = 1; it <= nb_iter; it++) {
do_tile (0, 0, DIM, DIM, 0);
swap_images ();
}
return 0;
}
///////////////////////////// Tiled sequential version (tiled)
// Suggested cmdline(s):
// ./run -l images/1024.png -k blur -v tiled -ts 32 -m si
//
unsigned blur_compute_tiled (unsigned nb_iter)
{
for (unsigned it = 1; it <= nb_iter; it++) {
for (int y = 0; y < DIM; y += TILE_H)
for (int x = 0; x < DIM; x += TILE_W)
do_tile (x, y, TILE_W, TILE_H, 0);
swap_images ();
}
return 0;
}

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\chapter{Introduction}
This class focuses on NVIDIA Jetson TX2, an embedded architecture from the same family than the Nitendo Switch. It is used in cars, satellites, etc.
This isn't a toy but a devkit.
\chapter{Programmable architectures}
\section{Simplified CPU architecture}
What we do in CS is using instructions to manipulate memory. More precisely, there are :
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\item control instructions
\item arithmetic instructions
\item memory instructions
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\section{CPU Architecture}
On modern CPU, CPU/RAM freq is between 1GHz and 4GHz
Memory throughput is ~50 GB/s (DDR5)
But CPU is much faster (×100), which is solved by caching.
\subsection{Memory hierarchy}
Most applications often reuse the same data.
We have :
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\item L2: ~10 cycles
\item L3: ~30 cycles
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Storing implies two methods :
\begin{itemize}
\item writethrough : write to both RAM and cache, a choice made in some architectures, leading to complex design in CPU arch.
\item writeback
\end{itemize}
\subsection{spatial locality}
While one cache line is a certain amount of data and the smallest packet between RAM and CPU is a cache line, it may be interesting to access data contiguously
\subsection{SIMD}
With scalar instructions, in 1 cycle, with two operands you create the content of a register.
With SIMD, in 1 cycle you do that with 4 operations at the same time. The registers are larger than regular ones, and called differently : vector registers.
\section{Co-processors}
Hardware separated from CPU, connected often via PCIe, with its own RAM.
\section{GPU Architecture}
Generally much more parallel than CPUs, fewer control parts than CPUs but much more compute units.
Memory is faster : 500 GB/s
It is often suitable for scientific computing but not always !
Hardware acceleration for AI (tensor cores) are often present. Not studied in this course.
\subsection{Nvidia Ampere}
We can see there are a lot of cores. Much more than in a CPU.
\section{Supercomputer architecture}
Here we design that as 8 computers connected via a switch. Theorical max performance is 8 times that of a node.
\chapter{Single-core CPU architecture}
\section{Pipeless processors}
[Remembering about pipeline]
\section{Pipelined processors}
[Remembering about pipeline]
Note : pipeline makes latency higher
Modern CPUs are 10 to 20 stages pipelined.
Conditional branchment implies that it's difficult to guess which instruction is the next, which is bad for pipeline efficiency (it created bubbles) so we have to predict... with branch prediction, to limit the effect.
\section{Superscalar processors}
[Remembering about this]
ILP = superscalar CPU fetcher/decoder
\section{Out of order execution (OoO)}
The CPU can reorder instructions basing on dependencies of instructions.
\section{Example: Apple Silicon M1}
This is an OoO CPU, since there is a dispatcher that has a reorder buffer.
There is a big part dedicated to SIMD.
\section{Example: Intel Alder Lake}
Much larger decoding part (yeah, CISC).
\section{So... our new toy ?}
There are :
\begin{itemize}
\item 2 × powerful Nvidia Denver 2 cores @ 2.04 GHz
\item 4 × powerful ARM Cortex A57 (Big) cores @ 2.0GHz
\item Weird heterogeneous design
\item No energy efficient cores
\end{itemize}
\subsection{Cortex A57 (2015)}
This is a 18-stage pipelined CPU, with 3-way decoder and it's 8-wide super-scalar. This is a OoO CPU.
\subsection{Nvidia Denver 2 (2016)}
Not much info about it...
We have :
\begin{itemize}
\item 15-stage pipeline
\item 2-way decoder
\item 7-wider superscalar
\item in-order execution (ARM code translated to something by a hardware translator, so it can be considered OoO since that translator reorders !)
\end{itemize}
Side note : the project was to decode ARM and x86 assembly on the same CPU, but Intel didn't gave the license
\section{Nvidia Jetson TX2 topology}
[See slides]
\chapter{Single-core CPU optimizations}
It's a good idea to rely on compilers for the sake of readability.
Compilers provide optimizations with '-O' options.
There is '-march=native' that is sometimes the only way to allow code vectorization.
\section{Latency and throughput}
We have :
\begin{itemize}
\item add: 4 cycles, 0.5 CPI
\item sub: idem
\item mul: idem
\item div: 14 cycles, 4 CPI
\end{itemize}
For the 3 first, we can have 2 inst/cycle !
\subsection{Example: division}
Here we see than we should avoid divisions (and use preprocessor to rewrite that as something else).
\section{Special functions}
On modern CPUs we have some common mathematical functions. These are often expensive, except for rsqrt (used for 3D/2D calculation)
\section{Function calls}
Sometimes it's better to avoid calls, especially depending on where the function call is located, for example with the stencil algorithm.
Inlining is a good idea.
\section{Loop unrolling}
It reduces the time spent in loop control, and especially the risk of branch prediction error.
In fact, it also increases optimization opportunities while exposing more parallelism for ILP, masks instruction latency.
To force the compiler to unroll code with '#pragma unroll 2'
The only problem with unrolling is that code is much bigger. So, only unroll when it makes sense !
\section{Unroll and jam}
It consists in unrolling and changing the order of instructions. It is especially useful for breaking data dependencies.
However it requires more registers.
\section{Variables rotation}
Here the compiler is not doing a good job unless you use the 'restrict' keyword.
\subsection{Reduction}
The compiler is able to do it if you help it
\section{Loop fusion}
This improves data reuse, taking advantage of temporal locality.
\section{Loop splitting}
Useful when there are more variables in a loop than registers available
\section{About conditional branching}
[...]
\section{Memory accesses}
To limite memory bandwidth overload, you can use pre-fetching : it consists in pre-loading data that are predicted to be useful later.
In all case, consider memory access pattern and take advantage of cache !
\newpage
% Bibliography
\nocite{*}
\addcontentsline{toc}{chapter}{Bibliographie}
\printbibliography
\end{document}

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\babel@toc {french}{}\relax
\contentsline {chapter}{\numberline {1}Introduction}{2}{chapter.1}%
\contentsline {chapter}{\numberline {2}Programmable architectures}{3}{chapter.2}%
\contentsline {section}{\numberline {2.1}Simplified CPU architecture}{3}{section.2.1}%
\contentsline {section}{\numberline {2.2}CPU Architecture}{3}{section.2.2}%
\contentsline {subsection}{\numberline {2.2.1}Memory hierarchy}{3}{subsection.2.2.1}%
\contentsline {subsection}{\numberline {2.2.2}spatial locality}{3}{subsection.2.2.2}%
\contentsline {subsection}{\numberline {2.2.3}SIMD}{3}{subsection.2.2.3}%
\contentsline {section}{\numberline {2.3}Co-processors}{4}{section.2.3}%
\contentsline {section}{\numberline {2.4}GPU Architecture}{4}{section.2.4}%
\contentsline {subsection}{\numberline {2.4.1}Nvidia Ampere}{4}{subsection.2.4.1}%
\contentsline {section}{\numberline {2.5}Supercomputer architecture}{4}{section.2.5}%
\contentsline {chapter}{\numberline {3}Single-core CPU architecture}{5}{chapter.3}%
\contentsline {section}{\numberline {3.1}Pipeless processors}{5}{section.3.1}%
\contentsline {section}{\numberline {3.2}Pipelined processors}{5}{section.3.2}%
\contentsline {section}{\numberline {3.3}Superscalar processors}{5}{section.3.3}%
\contentsline {section}{\numberline {3.4}Out of order execution (OoO)}{5}{section.3.4}%
\contentsline {section}{\numberline {3.5}Example: Apple Silicon M1}{5}{section.3.5}%
\contentsline {section}{\numberline {3.6}Example: Intel Alder Lake}{5}{section.3.6}%
\contentsline {section}{\numberline {3.7}So... our new toy ?}{5}{section.3.7}%
\contentsline {subsection}{\numberline {3.7.1}Cortex A57 (2015)}{6}{subsection.3.7.1}%
\contentsline {subsection}{\numberline {3.7.2}Nvidia Denver 2 (2016)}{6}{subsection.3.7.2}%
\contentsline {section}{\numberline {3.8}Nvidia Jetson TX2 topology}{6}{section.3.8}%
\contentsline {chapter}{\numberline {4}Single-core CPU optimizations}{7}{chapter.4}%
\contentsline {section}{\numberline {4.1}Latency and throughput}{7}{section.4.1}%
\contentsline {subsection}{\numberline {4.1.1}Example: division}{7}{subsection.4.1.1}%
\contentsline {section}{\numberline {4.2}Special functions}{7}{section.4.2}%
\contentsline {section}{\numberline {4.3}Function calls}{7}{section.4.3}%
\contentsline {section}{\numberline {4.4}Loop unrolling}{7}{section.4.4}%

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